Formal verification: an essential toolkit for modern VLSI design
Formal Verification: An Essential Toolkit for Modern VLSI Design presents practical approaches for design and validation, with hands-on advice for working engineers integrating these techniques into their work. Building on a basic knowledge of System Verilog, this book demystifies FV and presents th...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Amsterdam
Elsevier Science
2015
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| Schlagworte: | |
| Online-Zugang: | FLA01 Volltext |
| Zusammenfassung: | Formal Verification: An Essential Toolkit for Modern VLSI Design presents practical approaches for design and validation, with hands-on advice for working engineers integrating these techniques into their work. Building on a basic knowledge of System Verilog, this book demystifies FV and presents the practical applications that are bringing it into mainstream design and validation processes at Intel and other companies. The text prepares readers to effectively introduce FV in their organization and deploy FV techniques to increase design and validation productivity |
| Beschreibung: | Includes index. - How Do We Reach Targeted Behaviors? |
| Beschreibung: | 1 online resource (372 pages) illustrations |
| ISBN: | 9780128008157 0128008156 |
Internformat
MARC
| LEADER | 00000nmm a2200000zc 4500 | ||
|---|---|---|---|
| 001 | BV046126895 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | cr|uuu---uuuuu | ||
| 008 | 190827s2015 |||| o||u| ||||||eng d | ||
| 020 | |a 9780128008157 |9 978-0-12-800815-7 | ||
| 020 | |a 0128008156 |9 0-12-800815-6 | ||
| 035 | |a (ZDB-33-ESD)ocn915311665 | ||
| 035 | |a (OCoLC)915311665 | ||
| 035 | |a (DE-599)BVBBV046126895 | ||
| 040 | |a DE-604 |b ger |e rda | ||
| 041 | 0 | |a eng | |
| 082 | 0 | |a 621.3815/48 | |
| 100 | 1 | |a Seligman, Erik |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Formal verification |b an essential toolkit for modern VLSI design |c Erik Seligman, Tom Schubert, M.V. Achutha Kiran Kumar |
| 264 | 1 | |a Amsterdam |b Elsevier Science |c 2015 | |
| 300 | |a 1 online resource (372 pages) |b illustrations | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 500 | |a Includes index. - How Do We Reach Targeted Behaviors? | ||
| 520 | |a Formal Verification: An Essential Toolkit for Modern VLSI Design presents practical approaches for design and validation, with hands-on advice for working engineers integrating these techniques into their work. Building on a basic knowledge of System Verilog, this book demystifies FV and presents the practical applications that are bringing it into mainstream design and validation processes at Intel and other companies. The text prepares readers to effectively introduce FV in their organization and deploy FV techniques to increase design and validation productivity | ||
| 650 | 7 | |a TECHNOLOGY & ENGINEERING / Mechanical |2 bisacsh | |
| 650 | 7 | |a Electronic circuits / Testing |2 fast | |
| 650 | 7 | |a Integrated circuits / Very large scale integration / Design and construction |2 fast | |
| 650 | 7 | |a Verilog (Computer hardware description language) |2 fast | |
| 650 | 4 | |a Electronic circuits |x Testing | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Design and construction | |
| 650 | 4 | |a Verilog (Computer hardware description language) | |
| 700 | 1 | |a Schubert, Tom |e Sonstige |4 oth | |
| 700 | 1 | |a Kumar, M. V. Achutha Kiran |e Sonstige |4 oth | |
| 776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9780128007273 |
| 856 | 4 | 0 | |u http://www.sciencedirect.com/science/book/9780128007273 |x Verlag |z URL des Erstveröffentlichers |3 Volltext |
| 912 | |a ZDB-33-ESD | ||
| 999 | |a oai:aleph.bib-bvb.de:BVB01-031507348 | ||
| 966 | e | |u http://www.sciencedirect.com/science/book/9780128007273 |l FLA01 |p ZDB-33-ESD |q FLA_PDA_ESD |x Verlag |3 Volltext | |
Datensatz im Suchindex
| _version_ | 1804180447459016704 |
|---|---|
| any_adam_object | |
| author | Seligman, Erik |
| author_facet | Seligman, Erik |
| author_role | aut |
| author_sort | Seligman, Erik |
| author_variant | e s es |
| building | Verbundindex |
| bvnumber | BV046126895 |
| collection | ZDB-33-ESD |
| ctrlnum | (ZDB-33-ESD)ocn915311665 (OCoLC)915311665 (DE-599)BVBBV046126895 |
| dewey-full | 621.3815/48 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815/48 |
| dewey-search | 621.3815/48 |
| dewey-sort | 3621.3815 248 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02483nmm a2200457zc 4500</leader><controlfield tag="001">BV046126895</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">190827s2015 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9780128008157</subfield><subfield code="9">978-0-12-800815-7</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0128008156</subfield><subfield code="9">0-12-800815-6</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-33-ESD)ocn915311665</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)915311665</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV046126895</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rda</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815/48</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Seligman, Erik</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Formal verification</subfield><subfield code="b">an essential toolkit for modern VLSI design</subfield><subfield code="c">Erik Seligman, Tom Schubert, M.V. Achutha Kiran Kumar</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Amsterdam</subfield><subfield code="b">Elsevier Science</subfield><subfield code="c">2015</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 online resource (372 pages)</subfield><subfield code="b">illustrations</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Includes index. - How Do We Reach Targeted Behaviors?</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">Formal Verification: An Essential Toolkit for Modern VLSI Design presents practical approaches for design and validation, with hands-on advice for working engineers integrating these techniques into their work. Building on a basic knowledge of System Verilog, this book demystifies FV and presents the practical applications that are bringing it into mainstream design and validation processes at Intel and other companies. The text prepares readers to effectively introduce FV in their organization and deploy FV techniques to increase design and validation productivity</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">TECHNOLOGY & ENGINEERING / Mechanical</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Electronic circuits / Testing</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Integrated circuits / Very large scale integration / Design and construction</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Verilog (Computer hardware description language)</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic circuits</subfield><subfield code="x">Testing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Very large scale integration</subfield><subfield code="x">Design and construction</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Verilog (Computer hardware description language)</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Schubert, Tom</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Kumar, M. V. Achutha Kiran</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9780128007273</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">http://www.sciencedirect.com/science/book/9780128007273</subfield><subfield code="x">Verlag</subfield><subfield code="z">URL des Erstveröffentlichers</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-33-ESD</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-031507348</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">http://www.sciencedirect.com/science/book/9780128007273</subfield><subfield code="l">FLA01</subfield><subfield code="p">ZDB-33-ESD</subfield><subfield code="q">FLA_PDA_ESD</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
| id | DE-604.BV046126895 |
| illustrated | Illustrated |
| indexdate | 2024-07-10T08:35:54Z |
| institution | BVB |
| isbn | 9780128008157 0128008156 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-031507348 |
| oclc_num | 915311665 |
| open_access_boolean | |
| physical | 1 online resource (372 pages) illustrations |
| psigel | ZDB-33-ESD ZDB-33-ESD FLA_PDA_ESD |
| publishDate | 2015 |
| publishDateSearch | 2015 |
| publishDateSort | 2015 |
| publisher | Elsevier Science |
| record_format | marc |
| spelling | Seligman, Erik Verfasser aut Formal verification an essential toolkit for modern VLSI design Erik Seligman, Tom Schubert, M.V. Achutha Kiran Kumar Amsterdam Elsevier Science 2015 1 online resource (372 pages) illustrations txt rdacontent c rdamedia cr rdacarrier Includes index. - How Do We Reach Targeted Behaviors? Formal Verification: An Essential Toolkit for Modern VLSI Design presents practical approaches for design and validation, with hands-on advice for working engineers integrating these techniques into their work. Building on a basic knowledge of System Verilog, this book demystifies FV and presents the practical applications that are bringing it into mainstream design and validation processes at Intel and other companies. The text prepares readers to effectively introduce FV in their organization and deploy FV techniques to increase design and validation productivity TECHNOLOGY & ENGINEERING / Mechanical bisacsh Electronic circuits / Testing fast Integrated circuits / Very large scale integration / Design and construction fast Verilog (Computer hardware description language) fast Electronic circuits Testing Integrated circuits Very large scale integration Design and construction Verilog (Computer hardware description language) Schubert, Tom Sonstige oth Kumar, M. V. Achutha Kiran Sonstige oth Erscheint auch als Druck-Ausgabe 9780128007273 http://www.sciencedirect.com/science/book/9780128007273 Verlag URL des Erstveröffentlichers Volltext |
| spellingShingle | Seligman, Erik Formal verification an essential toolkit for modern VLSI design TECHNOLOGY & ENGINEERING / Mechanical bisacsh Electronic circuits / Testing fast Integrated circuits / Very large scale integration / Design and construction fast Verilog (Computer hardware description language) fast Electronic circuits Testing Integrated circuits Very large scale integration Design and construction Verilog (Computer hardware description language) |
| title | Formal verification an essential toolkit for modern VLSI design |
| title_auth | Formal verification an essential toolkit for modern VLSI design |
| title_exact_search | Formal verification an essential toolkit for modern VLSI design |
| title_full | Formal verification an essential toolkit for modern VLSI design Erik Seligman, Tom Schubert, M.V. Achutha Kiran Kumar |
| title_fullStr | Formal verification an essential toolkit for modern VLSI design Erik Seligman, Tom Schubert, M.V. Achutha Kiran Kumar |
| title_full_unstemmed | Formal verification an essential toolkit for modern VLSI design Erik Seligman, Tom Schubert, M.V. Achutha Kiran Kumar |
| title_short | Formal verification |
| title_sort | formal verification an essential toolkit for modern vlsi design |
| title_sub | an essential toolkit for modern VLSI design |
| topic | TECHNOLOGY & ENGINEERING / Mechanical bisacsh Electronic circuits / Testing fast Integrated circuits / Very large scale integration / Design and construction fast Verilog (Computer hardware description language) fast Electronic circuits Testing Integrated circuits Very large scale integration Design and construction Verilog (Computer hardware description language) |
| topic_facet | TECHNOLOGY & ENGINEERING / Mechanical Electronic circuits / Testing Integrated circuits / Very large scale integration / Design and construction Verilog (Computer hardware description language) Electronic circuits Testing Integrated circuits Very large scale integration Design and construction |
| url | http://www.sciencedirect.com/science/book/9780128007273 |
| work_keys_str_mv | AT seligmanerik formalverificationanessentialtoolkitformodernvlsidesign AT schuberttom formalverificationanessentialtoolkitformodernvlsidesign AT kumarmvachuthakiran formalverificationanessentialtoolkitformodernvlsidesign |