Neuromorphic circuits for nanoscale devices /:
Nanoscale devices attracted significant research effort from the industry and academia due to their operation principals being based on different physical properties which provide advantages in the design of certain classes of circuits over conventional CMOS transistors. Neuromorphic Circuits for Na...
Gespeichert in:
| Hauptverfasser: | , , , |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Gistrup, Denmark :
River Publishers,
[2019]
|
| Schriftenreihe: | River Publishers series in biomedical engineering.
|
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Zusammenfassung: | Nanoscale devices attracted significant research effort from the industry and academia due to their operation principals being based on different physical properties which provide advantages in the design of certain classes of circuits over conventional CMOS transistors. Neuromorphic Circuits for Nanoscale Devices contains recent research papers presented in various international conferences and journals to provide insight into how the operational principles of the nanoscale devices can be utilized for the design of neuromorphic circuits for various applications of non-volatile memory, neural network training/learning, and image processing. The topics discussed in the book include: * Nanoscale Crossbar Memory Design * Q-Learning and Value Iteration using Nanoscale Devices * Image Processing and Computer Vision Applications for Nanoscale Devices * Nanoscale Devices based Cellular Nonlinear/Neural Networks. |
| Beschreibung: | 5.2.1 Lateral Inhibition |
| Beschreibung: | 1 online resource |
| Bibliographie: | Includes bibliographical references and index. |
| ISBN: | 9788770220590 877022059X |
Internformat
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| 245 | 1 | 0 | |a Neuromorphic circuits for nanoscale devices / |c Pinaki Mazumder, Yalcin Yilmaz, Idongesit Ebong, Woo Hyung Lee. |
| 264 | 1 | |a Gistrup, Denmark : |b River Publishers, |c [2019] | |
| 300 | |a 1 online resource | ||
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| 490 | 1 | |a River Publishers series in biomedical engineering | |
| 504 | |a Includes bibliographical references and index. | ||
| 505 | 0 | |a Front Cover; Half Title; Series Page -- RIVER PUBLISHERS SERIES IN BIOMEDICAL ENGINEERING; Title Page; Copyright Page; Contents; Preface; Acknowledgement; List of Contributors; List of Figures; List of Tables; List of Abbreviations; Chapter 1 -- Introduction; 1.1 Discovery; 1.2 The Missing Memristor; 1.2.1 Definitions; 1.2.2 DC Response of an Ideal Memristor; 1.2.3 AC Response of an Ideal Memristor; 1.2.4 AC Response of an Ideal Memristor: Higher Frequencies; 1.2.5 Some Further Observations; 1.2.5.1 Requirement 1: Nonlinearity; 1.2.5.2 Requirement 2: Continuous ' v. q | |
| 505 | 8 | |a 1.2.5.3 Requirement 3: Strictly monotonically increasing ' v. q1.2.6 Summary; 1.3 Memristive Devices and Systems; 1.3.1 Definitions; 1.3.2 Resistive Switching Mechanisms; 1.3.3 Transport of Mobile Ions; 1.3.4 Formation of Conduction Filaments; 1.3.5 Phase Change Transitions; 1.3.6 Resonant Tunneling Diodes; 1.3.7 Magnetoresistive Memory, Nanoparticles and Multi-State Devices; 1.3.7.1 Spin-transfer torque; 1.3.7.2 Nanoparticles; 1.3.7.3 Multi-state memories; 1.4 Neuromorphic Computing; 1.4.1 Memristive Synapse; 1.4.2 Memristive Neuron; 1.4.3 Memristive Neural Networks | |
| 505 | 8 | |a 1.4.3.1 Crossbar processing: Read1.4.3.2 Crossbar processing: Write; 1.4.3.3 Crossbar processing: Training; 1.5 Looking Forward; References; Chapter 2 -- Crossbar Memory Simulation and Performance Evaluation; 2.1 Introduction; 2.1.1 Motivation; 2.1.2 Contrast with Competing Technologies; 2.1.3 Amorphous Si Crossbar Memory Cell; 2.2 Structure; 2.2.1 Crossbar Modeling; 2.3 Write Strategy and Circuit Implementation; 2.4 Read Strategy and Circuit Implementation; 2.5 Memory Architecture; 2.6 Power Dissipation; 2.6.1 Power Estimation; 2.6.2 Analytical Modeling on Static Power; 2.7 Noise Analysis | |
| 505 | 8 | |a 2.8 Area Overhead2.8.1 Bank-based System Design; 2.9 Technology Comparison; References; Chapter 3 -- Memristor Digital Memory; 3.1 Introduction; 3.2 Adaptive Reading and Writing in Memristor Memory; 3.3 Simulation Results; 3.3.1 High State Simulation (HSS); 3.3.2 Background Resistance Sweep (BRS); 3.3.3 Minimum Resistance Sweep (MRS); 3.3.4 Diode Leakage Current (DLC); 3.3.5 Power Modeling; 3.4 Adaptive Methods Results and Discussion; 3.5 Chapter Summary; References; Chapter 4 -- Multi-Level Memory Architecture; 4.1 Introduction; 4.2 Multi-State Memory Architecture; 4.2.1 Architecture | |
| 505 | 8 | |a 4.2.2 Read/Write Circuitry4.2.3 Array Voltage Bias Scheme; 4.2.4 Read/Write Operations Flow; 4.2.5 State Derivations; 4.3 Read/Write Operations; 4.3.1 Read/Write Simulations; 4.3.2 Read Disturbances to the Neighboring Cells; 4.4 Effects of Variations; 4.4.1 Variations in Programming Voltage; 4.4.2 Variations in Series Resistance; 4.4.3 Reduced-Impact Read Scheme; 4.4.4 Resistance Distributions after Array Writes; 4.5 Conclusion; References; Chapter 5 -- Neuromorphic Building Blocks with Memristors; 5.1 Introduction; 5.2 Implementing Neuromorphic Functions with Memristors | |
| 500 | |a 5.2.1 Lateral Inhibition | ||
| 588 | 0 | |a Online resource; title from digital title page (viewed on January 15, 2020). | |
| 520 | |a Nanoscale devices attracted significant research effort from the industry and academia due to their operation principals being based on different physical properties which provide advantages in the design of certain classes of circuits over conventional CMOS transistors. Neuromorphic Circuits for Nanoscale Devices contains recent research papers presented in various international conferences and journals to provide insight into how the operational principles of the nanoscale devices can be utilized for the design of neuromorphic circuits for various applications of non-volatile memory, neural network training/learning, and image processing. The topics discussed in the book include: * Nanoscale Crossbar Memory Design * Q-Learning and Value Iteration using Nanoscale Devices * Image Processing and Computer Vision Applications for Nanoscale Devices * Nanoscale Devices based Cellular Nonlinear/Neural Networks. | ||
| 650 | 0 | |a Nanoelectromechanical systems. |0 http://id.loc.gov/authorities/subjects/sh2006008121 | |
| 650 | 0 | |a Neuromorphics. |0 http://id.loc.gov/authorities/subjects/sh2014002096 | |
| 650 | 6 | |a Nanosystèmes électromécaniques. | |
| 650 | 6 | |a Ingénierie neuromorphique. | |
| 650 | 7 | |a Nanoelectromechanical systems |2 fast | |
| 650 | 7 | |a Neuromorphics |2 fast | |
| 700 | 1 | |a Yilmaz, Yalcin, |e author. | |
| 700 | 1 | |a Ebong, Idongesit, |e author. | |
| 700 | 1 | |a Lee, Woo Hyung, |e author. | |
| 758 | |i has work: |a Neuromorphic circuits for nanoscale devices (Text) |1 https://id.oclc.org/worldcat/entity/E39PCGM4VKbky8G3GHH7Yv7Y6C |4 https://id.oclc.org/worldcat/ontology/hasWork | ||
| 776 | 0 | 8 | |i Print version: |a Mazumder, Pinaki. |t Neuromorphic Circuits for Nanoscale Devices. |d Aalborg : River Publishers, ©2019 |z 9788770220606 |
| 830 | 0 | |a River Publishers series in biomedical engineering. | |
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| author | Mazumder, Pinaki Yilmaz, Yalcin Ebong, Idongesit Lee, Woo Hyung |
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| author_facet | Mazumder, Pinaki Yilmaz, Yalcin Ebong, Idongesit Lee, Woo Hyung |
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| contents | Front Cover; Half Title; Series Page -- RIVER PUBLISHERS SERIES IN BIOMEDICAL ENGINEERING; Title Page; Copyright Page; Contents; Preface; Acknowledgement; List of Contributors; List of Figures; List of Tables; List of Abbreviations; Chapter 1 -- Introduction; 1.1 Discovery; 1.2 The Missing Memristor; 1.2.1 Definitions; 1.2.2 DC Response of an Ideal Memristor; 1.2.3 AC Response of an Ideal Memristor; 1.2.4 AC Response of an Ideal Memristor: Higher Frequencies; 1.2.5 Some Further Observations; 1.2.5.1 Requirement 1: Nonlinearity; 1.2.5.2 Requirement 2: Continuous ' v. q 1.2.5.3 Requirement 3: Strictly monotonically increasing ' v. q1.2.6 Summary; 1.3 Memristive Devices and Systems; 1.3.1 Definitions; 1.3.2 Resistive Switching Mechanisms; 1.3.3 Transport of Mobile Ions; 1.3.4 Formation of Conduction Filaments; 1.3.5 Phase Change Transitions; 1.3.6 Resonant Tunneling Diodes; 1.3.7 Magnetoresistive Memory, Nanoparticles and Multi-State Devices; 1.3.7.1 Spin-transfer torque; 1.3.7.2 Nanoparticles; 1.3.7.3 Multi-state memories; 1.4 Neuromorphic Computing; 1.4.1 Memristive Synapse; 1.4.2 Memristive Neuron; 1.4.3 Memristive Neural Networks 1.4.3.1 Crossbar processing: Read1.4.3.2 Crossbar processing: Write; 1.4.3.3 Crossbar processing: Training; 1.5 Looking Forward; References; Chapter 2 -- Crossbar Memory Simulation and Performance Evaluation; 2.1 Introduction; 2.1.1 Motivation; 2.1.2 Contrast with Competing Technologies; 2.1.3 Amorphous Si Crossbar Memory Cell; 2.2 Structure; 2.2.1 Crossbar Modeling; 2.3 Write Strategy and Circuit Implementation; 2.4 Read Strategy and Circuit Implementation; 2.5 Memory Architecture; 2.6 Power Dissipation; 2.6.1 Power Estimation; 2.6.2 Analytical Modeling on Static Power; 2.7 Noise Analysis 2.8 Area Overhead2.8.1 Bank-based System Design; 2.9 Technology Comparison; References; Chapter 3 -- Memristor Digital Memory; 3.1 Introduction; 3.2 Adaptive Reading and Writing in Memristor Memory; 3.3 Simulation Results; 3.3.1 High State Simulation (HSS); 3.3.2 Background Resistance Sweep (BRS); 3.3.3 Minimum Resistance Sweep (MRS); 3.3.4 Diode Leakage Current (DLC); 3.3.5 Power Modeling; 3.4 Adaptive Methods Results and Discussion; 3.5 Chapter Summary; References; Chapter 4 -- Multi-Level Memory Architecture; 4.1 Introduction; 4.2 Multi-State Memory Architecture; 4.2.1 Architecture 4.2.2 Read/Write Circuitry4.2.3 Array Voltage Bias Scheme; 4.2.4 Read/Write Operations Flow; 4.2.5 State Derivations; 4.3 Read/Write Operations; 4.3.1 Read/Write Simulations; 4.3.2 Read Disturbances to the Neighboring Cells; 4.4 Effects of Variations; 4.4.1 Variations in Programming Voltage; 4.4.2 Variations in Series Resistance; 4.4.3 Reduced-Impact Read Scheme; 4.4.4 Resistance Distributions after Array Writes; 4.5 Conclusion; References; Chapter 5 -- Neuromorphic Building Blocks with Memristors; 5.1 Introduction; 5.2 Implementing Neuromorphic Functions with Memristors |
| ctrlnum | (OCoLC)1125114486 |
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| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.381 |
| dewey-search | 621.381 |
| dewey-sort | 3621.381 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
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| illustrated | Not Illustrated |
| indexdate | 2024-11-27T13:29:39Z |
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| series | River Publishers series in biomedical engineering. |
| series2 | River Publishers series in biomedical engineering |
| spelling | Mazumder, Pinaki, author. https://id.oclc.org/worldcat/entity/E39PCjqr6hJ8fv8cFxyPKqw4D3 http://id.loc.gov/authorities/names/n96072344 Neuromorphic circuits for nanoscale devices / Pinaki Mazumder, Yalcin Yilmaz, Idongesit Ebong, Woo Hyung Lee. Gistrup, Denmark : River Publishers, [2019] 1 online resource text txt rdacontent computer c rdamedia online resource cr rdacarrier River Publishers series in biomedical engineering Includes bibliographical references and index. Front Cover; Half Title; Series Page -- RIVER PUBLISHERS SERIES IN BIOMEDICAL ENGINEERING; Title Page; Copyright Page; Contents; Preface; Acknowledgement; List of Contributors; List of Figures; List of Tables; List of Abbreviations; Chapter 1 -- Introduction; 1.1 Discovery; 1.2 The Missing Memristor; 1.2.1 Definitions; 1.2.2 DC Response of an Ideal Memristor; 1.2.3 AC Response of an Ideal Memristor; 1.2.4 AC Response of an Ideal Memristor: Higher Frequencies; 1.2.5 Some Further Observations; 1.2.5.1 Requirement 1: Nonlinearity; 1.2.5.2 Requirement 2: Continuous ' v. q 1.2.5.3 Requirement 3: Strictly monotonically increasing ' v. q1.2.6 Summary; 1.3 Memristive Devices and Systems; 1.3.1 Definitions; 1.3.2 Resistive Switching Mechanisms; 1.3.3 Transport of Mobile Ions; 1.3.4 Formation of Conduction Filaments; 1.3.5 Phase Change Transitions; 1.3.6 Resonant Tunneling Diodes; 1.3.7 Magnetoresistive Memory, Nanoparticles and Multi-State Devices; 1.3.7.1 Spin-transfer torque; 1.3.7.2 Nanoparticles; 1.3.7.3 Multi-state memories; 1.4 Neuromorphic Computing; 1.4.1 Memristive Synapse; 1.4.2 Memristive Neuron; 1.4.3 Memristive Neural Networks 1.4.3.1 Crossbar processing: Read1.4.3.2 Crossbar processing: Write; 1.4.3.3 Crossbar processing: Training; 1.5 Looking Forward; References; Chapter 2 -- Crossbar Memory Simulation and Performance Evaluation; 2.1 Introduction; 2.1.1 Motivation; 2.1.2 Contrast with Competing Technologies; 2.1.3 Amorphous Si Crossbar Memory Cell; 2.2 Structure; 2.2.1 Crossbar Modeling; 2.3 Write Strategy and Circuit Implementation; 2.4 Read Strategy and Circuit Implementation; 2.5 Memory Architecture; 2.6 Power Dissipation; 2.6.1 Power Estimation; 2.6.2 Analytical Modeling on Static Power; 2.7 Noise Analysis 2.8 Area Overhead2.8.1 Bank-based System Design; 2.9 Technology Comparison; References; Chapter 3 -- Memristor Digital Memory; 3.1 Introduction; 3.2 Adaptive Reading and Writing in Memristor Memory; 3.3 Simulation Results; 3.3.1 High State Simulation (HSS); 3.3.2 Background Resistance Sweep (BRS); 3.3.3 Minimum Resistance Sweep (MRS); 3.3.4 Diode Leakage Current (DLC); 3.3.5 Power Modeling; 3.4 Adaptive Methods Results and Discussion; 3.5 Chapter Summary; References; Chapter 4 -- Multi-Level Memory Architecture; 4.1 Introduction; 4.2 Multi-State Memory Architecture; 4.2.1 Architecture 4.2.2 Read/Write Circuitry4.2.3 Array Voltage Bias Scheme; 4.2.4 Read/Write Operations Flow; 4.2.5 State Derivations; 4.3 Read/Write Operations; 4.3.1 Read/Write Simulations; 4.3.2 Read Disturbances to the Neighboring Cells; 4.4 Effects of Variations; 4.4.1 Variations in Programming Voltage; 4.4.2 Variations in Series Resistance; 4.4.3 Reduced-Impact Read Scheme; 4.4.4 Resistance Distributions after Array Writes; 4.5 Conclusion; References; Chapter 5 -- Neuromorphic Building Blocks with Memristors; 5.1 Introduction; 5.2 Implementing Neuromorphic Functions with Memristors 5.2.1 Lateral Inhibition Online resource; title from digital title page (viewed on January 15, 2020). Nanoscale devices attracted significant research effort from the industry and academia due to their operation principals being based on different physical properties which provide advantages in the design of certain classes of circuits over conventional CMOS transistors. Neuromorphic Circuits for Nanoscale Devices contains recent research papers presented in various international conferences and journals to provide insight into how the operational principles of the nanoscale devices can be utilized for the design of neuromorphic circuits for various applications of non-volatile memory, neural network training/learning, and image processing. The topics discussed in the book include: * Nanoscale Crossbar Memory Design * Q-Learning and Value Iteration using Nanoscale Devices * Image Processing and Computer Vision Applications for Nanoscale Devices * Nanoscale Devices based Cellular Nonlinear/Neural Networks. Nanoelectromechanical systems. http://id.loc.gov/authorities/subjects/sh2006008121 Neuromorphics. http://id.loc.gov/authorities/subjects/sh2014002096 Nanosystèmes électromécaniques. Ingénierie neuromorphique. Nanoelectromechanical systems fast Neuromorphics fast Yilmaz, Yalcin, author. Ebong, Idongesit, author. Lee, Woo Hyung, author. has work: Neuromorphic circuits for nanoscale devices (Text) https://id.oclc.org/worldcat/entity/E39PCGM4VKbky8G3GHH7Yv7Y6C https://id.oclc.org/worldcat/ontology/hasWork Print version: Mazumder, Pinaki. Neuromorphic Circuits for Nanoscale Devices. Aalborg : River Publishers, ©2019 9788770220606 River Publishers series in biomedical engineering. FWS01 ZDB-4-EBA FWS_PDA_EBA https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=2277683 Volltext |
| spellingShingle | Mazumder, Pinaki Yilmaz, Yalcin Ebong, Idongesit Lee, Woo Hyung Neuromorphic circuits for nanoscale devices / River Publishers series in biomedical engineering. Front Cover; Half Title; Series Page -- RIVER PUBLISHERS SERIES IN BIOMEDICAL ENGINEERING; Title Page; Copyright Page; Contents; Preface; Acknowledgement; List of Contributors; List of Figures; List of Tables; List of Abbreviations; Chapter 1 -- Introduction; 1.1 Discovery; 1.2 The Missing Memristor; 1.2.1 Definitions; 1.2.2 DC Response of an Ideal Memristor; 1.2.3 AC Response of an Ideal Memristor; 1.2.4 AC Response of an Ideal Memristor: Higher Frequencies; 1.2.5 Some Further Observations; 1.2.5.1 Requirement 1: Nonlinearity; 1.2.5.2 Requirement 2: Continuous ' v. q 1.2.5.3 Requirement 3: Strictly monotonically increasing ' v. q1.2.6 Summary; 1.3 Memristive Devices and Systems; 1.3.1 Definitions; 1.3.2 Resistive Switching Mechanisms; 1.3.3 Transport of Mobile Ions; 1.3.4 Formation of Conduction Filaments; 1.3.5 Phase Change Transitions; 1.3.6 Resonant Tunneling Diodes; 1.3.7 Magnetoresistive Memory, Nanoparticles and Multi-State Devices; 1.3.7.1 Spin-transfer torque; 1.3.7.2 Nanoparticles; 1.3.7.3 Multi-state memories; 1.4 Neuromorphic Computing; 1.4.1 Memristive Synapse; 1.4.2 Memristive Neuron; 1.4.3 Memristive Neural Networks 1.4.3.1 Crossbar processing: Read1.4.3.2 Crossbar processing: Write; 1.4.3.3 Crossbar processing: Training; 1.5 Looking Forward; References; Chapter 2 -- Crossbar Memory Simulation and Performance Evaluation; 2.1 Introduction; 2.1.1 Motivation; 2.1.2 Contrast with Competing Technologies; 2.1.3 Amorphous Si Crossbar Memory Cell; 2.2 Structure; 2.2.1 Crossbar Modeling; 2.3 Write Strategy and Circuit Implementation; 2.4 Read Strategy and Circuit Implementation; 2.5 Memory Architecture; 2.6 Power Dissipation; 2.6.1 Power Estimation; 2.6.2 Analytical Modeling on Static Power; 2.7 Noise Analysis 2.8 Area Overhead2.8.1 Bank-based System Design; 2.9 Technology Comparison; References; Chapter 3 -- Memristor Digital Memory; 3.1 Introduction; 3.2 Adaptive Reading and Writing in Memristor Memory; 3.3 Simulation Results; 3.3.1 High State Simulation (HSS); 3.3.2 Background Resistance Sweep (BRS); 3.3.3 Minimum Resistance Sweep (MRS); 3.3.4 Diode Leakage Current (DLC); 3.3.5 Power Modeling; 3.4 Adaptive Methods Results and Discussion; 3.5 Chapter Summary; References; Chapter 4 -- Multi-Level Memory Architecture; 4.1 Introduction; 4.2 Multi-State Memory Architecture; 4.2.1 Architecture 4.2.2 Read/Write Circuitry4.2.3 Array Voltage Bias Scheme; 4.2.4 Read/Write Operations Flow; 4.2.5 State Derivations; 4.3 Read/Write Operations; 4.3.1 Read/Write Simulations; 4.3.2 Read Disturbances to the Neighboring Cells; 4.4 Effects of Variations; 4.4.1 Variations in Programming Voltage; 4.4.2 Variations in Series Resistance; 4.4.3 Reduced-Impact Read Scheme; 4.4.4 Resistance Distributions after Array Writes; 4.5 Conclusion; References; Chapter 5 -- Neuromorphic Building Blocks with Memristors; 5.1 Introduction; 5.2 Implementing Neuromorphic Functions with Memristors Nanoelectromechanical systems. http://id.loc.gov/authorities/subjects/sh2006008121 Neuromorphics. http://id.loc.gov/authorities/subjects/sh2014002096 Nanosystèmes électromécaniques. Ingénierie neuromorphique. Nanoelectromechanical systems fast Neuromorphics fast |
| subject_GND | http://id.loc.gov/authorities/subjects/sh2006008121 http://id.loc.gov/authorities/subjects/sh2014002096 |
| title | Neuromorphic circuits for nanoscale devices / |
| title_auth | Neuromorphic circuits for nanoscale devices / |
| title_exact_search | Neuromorphic circuits for nanoscale devices / |
| title_full | Neuromorphic circuits for nanoscale devices / Pinaki Mazumder, Yalcin Yilmaz, Idongesit Ebong, Woo Hyung Lee. |
| title_fullStr | Neuromorphic circuits for nanoscale devices / Pinaki Mazumder, Yalcin Yilmaz, Idongesit Ebong, Woo Hyung Lee. |
| title_full_unstemmed | Neuromorphic circuits for nanoscale devices / Pinaki Mazumder, Yalcin Yilmaz, Idongesit Ebong, Woo Hyung Lee. |
| title_short | Neuromorphic circuits for nanoscale devices / |
| title_sort | neuromorphic circuits for nanoscale devices |
| topic | Nanoelectromechanical systems. http://id.loc.gov/authorities/subjects/sh2006008121 Neuromorphics. http://id.loc.gov/authorities/subjects/sh2014002096 Nanosystèmes électromécaniques. Ingénierie neuromorphique. Nanoelectromechanical systems fast Neuromorphics fast |
| topic_facet | Nanoelectromechanical systems. Neuromorphics. Nanosystèmes électromécaniques. Ingénierie neuromorphique. Nanoelectromechanical systems Neuromorphics |
| url | https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=2277683 |
| work_keys_str_mv | AT mazumderpinaki neuromorphiccircuitsfornanoscaledevices AT yilmazyalcin neuromorphiccircuitsfornanoscaledevices AT ebongidongesit neuromorphiccircuitsfornanoscaledevices AT leewoohyung neuromorphiccircuitsfornanoscaledevices |