Advanced topics in microelectronics and system design /:
This volume covers a wide area - from research topics to the design and improvement of integrated circuit devices, already existing or to be introduced to the market.
Saved in:
| Other Authors: | , , |
|---|---|
| Format: | Electronic eBook |
| Language: | English |
| Published: |
Singapore ; River Edge, NJ :
World Scientific,
©2000.
|
| Subjects: | |
| Online Access: | DE-862 DE-863 |
| Summary: | This volume covers a wide area - from research topics to the design and improvement of integrated circuit devices, already existing or to be introduced to the market. |
| Physical Description: | 1 online resource (xii, 251 pages) : illustrations |
| Bibliography: | Includes bibliographical references. |
| ISBN: | 9789812792112 9812792112 |
Staff View
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| 245 | 0 | 0 | |a Advanced topics in microelectronics and system design / |c editors, Giuseppe Ferla, Luigi Fortuna, Antonio Imbruglia. |
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| 505 | 0 | |a Preface; Analog Layout Area Optimization; Introduction; Experimental Activity; Introduction; Automatic placement tools in ST Microelectronics; Software for areas evaluation; Conclusions; References; Analysis of a Flash Memory Device; Introduction; The Flash Memory Cell; CMOS memories; The MOSFET with a floating gate; Comparison between Flash EPROM and EEPROM memories; Programming and erasing mechanisms; Simulation and Verification Flow; The simulation tool: Powermill; Simulation flow and verification; Electrical and Functional Characteristics of the Device; General Characteristics. | |
| 505 | 8 | |a Detailed description of signals. Bus operations; Command Interface; Read Operation; The Finite State Machine; Blocks Structure of the Device; Decoding; Pre-decoding and decoding of a column; The Read Path; Sense Amplifier; Program Operation; Instructions definition; Programming; The CUI; The internal microprocessor; The program algorithm; Device simulation; Erase Operation; Starting of the CUI state machine; The erase algorithm; Conclusions; References; VHDL Design, DFT, ATPG & Layout Implementation Service of a Digital Block for a DAC Converter; Introduction; Obtained Results. | |
| 505 | 8 | |a VHDL Design, DFT & Layout Implementation Service ProjectVHDL Design of DB-DAC Module; Some words about VHDL & synthesis; DAC block description; Convolution algorithm implementation; ROM & RAM mappings; Our architecture of the OVERSAMPLER module; -RAM & ROM memory; -Address generator; -Pre-accumulator; -MAC (Multiplier and Accumulator); -Selector; -Sequencer; -Control Logic; DFT Implementation and ATPG of DB-DAC; Testing of integrated circuits; Fault models; Test pattern; Fault and test coverage; Automatic test patterns generation (ATPG); Design for testability; Scan-path methodology. | |
| 505 | 8 | |a DFT Implementation flow for DB-DA CDFT Implementation and ATPG of DB-DAC; Scan chain insertion for DB-DAC; Test logic insertion for DB-DAC; Test pattern generation for DB-DAC; Chip Assembly and Layout Implementation; LVS results; Conclusions; References; Improving the ST20C2P Microprocessor: An Introduction; Introduction; The ST20 Microprocessor; Top level; Instruction representation; Instruction encoding; The instruction data value and prefixing; Primary Instruction; Secondary instructions; Grouping; C2P Pipeline Description; Improvement; IBuffer; Conclusions; References. | |
| 505 | 8 | |a Actual Status and Possible Development for CHIMERA Readout and Control SystemIntroduction; The Detectors; The Cs(Tl) crystal; Detector diagnostic; The Electronic Chain; The acquisition system; The Trigger System; The timing circuit; Conclusions; References; Passive Component Modelling with HFSS; Introduction; HFSS-Electromagnetic Simulator Ansoft; Finite Element Method (FEM); Design Flow with HFSS; Draw; Setup Materials; Setup Boundaries / Source; Setup Solution; Post-Processor; HSB2 Technology; Application and Results; Microstrips in metal 3; Microstrip design with HFSS; Results; Conclusions. | |
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| author2 | Ferla, Giuseppe Fortuna, L. (Luigi), 1953- Imbruglia, Antonio |
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| contents | Preface; Analog Layout Area Optimization; Introduction; Experimental Activity; Introduction; Automatic placement tools in ST Microelectronics; Software for areas evaluation; Conclusions; References; Analysis of a Flash Memory Device; Introduction; The Flash Memory Cell; CMOS memories; The MOSFET with a floating gate; Comparison between Flash EPROM and EEPROM memories; Programming and erasing mechanisms; Simulation and Verification Flow; The simulation tool: Powermill; Simulation flow and verification; Electrical and Functional Characteristics of the Device; General Characteristics. Detailed description of signals. Bus operations; Command Interface; Read Operation; The Finite State Machine; Blocks Structure of the Device; Decoding; Pre-decoding and decoding of a column; The Read Path; Sense Amplifier; Program Operation; Instructions definition; Programming; The CUI; The internal microprocessor; The program algorithm; Device simulation; Erase Operation; Starting of the CUI state machine; The erase algorithm; Conclusions; References; VHDL Design, DFT, ATPG & Layout Implementation Service of a Digital Block for a DAC Converter; Introduction; Obtained Results. VHDL Design, DFT & Layout Implementation Service ProjectVHDL Design of DB-DAC Module; Some words about VHDL & synthesis; DAC block description; Convolution algorithm implementation; ROM & RAM mappings; Our architecture of the OVERSAMPLER module; -RAM & ROM memory; -Address generator; -Pre-accumulator; -MAC (Multiplier and Accumulator); -Selector; -Sequencer; -Control Logic; DFT Implementation and ATPG of DB-DAC; Testing of integrated circuits; Fault models; Test pattern; Fault and test coverage; Automatic test patterns generation (ATPG); Design for testability; Scan-path methodology. DFT Implementation flow for DB-DA CDFT Implementation and ATPG of DB-DAC; Scan chain insertion for DB-DAC; Test logic insertion for DB-DAC; Test pattern generation for DB-DAC; Chip Assembly and Layout Implementation; LVS results; Conclusions; References; Improving the ST20C2P Microprocessor: An Introduction; Introduction; The ST20 Microprocessor; Top level; Instruction representation; Instruction encoding; The instruction data value and prefixing; Primary Instruction; Secondary instructions; Grouping; C2P Pipeline Description; Improvement; IBuffer; Conclusions; References. Actual Status and Possible Development for CHIMERA Readout and Control SystemIntroduction; The Detectors; The Cs(Tl) crystal; Detector diagnostic; The Electronic Chain; The acquisition system; The Trigger System; The timing circuit; Conclusions; References; Passive Component Modelling with HFSS; Introduction; HFSS-Electromagnetic Simulator Ansoft; Finite Element Method (FEM); Design Flow with HFSS; Draw; Setup Materials; Setup Boundaries / Source; Setup Solution; Post-Processor; HSB2 Technology; Application and Results; Microstrips in metal 3; Microstrip design with HFSS; Results; Conclusions. |
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| dewey-search | 621.381 |
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| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
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| indexdate | 2025-04-11T08:41:17Z |
| institution | BVB |
| isbn | 9789812792112 9812792112 |
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| publisher | World Scientific, |
| record_format | marc |
| spelling | Advanced topics in microelectronics and system design / editors, Giuseppe Ferla, Luigi Fortuna, Antonio Imbruglia. Singapore ; River Edge, NJ : World Scientific, ©2000. 1 online resource (xii, 251 pages) : illustrations text txt rdacontent computer c rdamedia online resource cr rdacarrier Includes bibliographical references. Print version record. Preface; Analog Layout Area Optimization; Introduction; Experimental Activity; Introduction; Automatic placement tools in ST Microelectronics; Software for areas evaluation; Conclusions; References; Analysis of a Flash Memory Device; Introduction; The Flash Memory Cell; CMOS memories; The MOSFET with a floating gate; Comparison between Flash EPROM and EEPROM memories; Programming and erasing mechanisms; Simulation and Verification Flow; The simulation tool: Powermill; Simulation flow and verification; Electrical and Functional Characteristics of the Device; General Characteristics. Detailed description of signals. Bus operations; Command Interface; Read Operation; The Finite State Machine; Blocks Structure of the Device; Decoding; Pre-decoding and decoding of a column; The Read Path; Sense Amplifier; Program Operation; Instructions definition; Programming; The CUI; The internal microprocessor; The program algorithm; Device simulation; Erase Operation; Starting of the CUI state machine; The erase algorithm; Conclusions; References; VHDL Design, DFT, ATPG & Layout Implementation Service of a Digital Block for a DAC Converter; Introduction; Obtained Results. VHDL Design, DFT & Layout Implementation Service ProjectVHDL Design of DB-DAC Module; Some words about VHDL & synthesis; DAC block description; Convolution algorithm implementation; ROM & RAM mappings; Our architecture of the OVERSAMPLER module; -RAM & ROM memory; -Address generator; -Pre-accumulator; -MAC (Multiplier and Accumulator); -Selector; -Sequencer; -Control Logic; DFT Implementation and ATPG of DB-DAC; Testing of integrated circuits; Fault models; Test pattern; Fault and test coverage; Automatic test patterns generation (ATPG); Design for testability; Scan-path methodology. DFT Implementation flow for DB-DA CDFT Implementation and ATPG of DB-DAC; Scan chain insertion for DB-DAC; Test logic insertion for DB-DAC; Test pattern generation for DB-DAC; Chip Assembly and Layout Implementation; LVS results; Conclusions; References; Improving the ST20C2P Microprocessor: An Introduction; Introduction; The ST20 Microprocessor; Top level; Instruction representation; Instruction encoding; The instruction data value and prefixing; Primary Instruction; Secondary instructions; Grouping; C2P Pipeline Description; Improvement; IBuffer; Conclusions; References. Actual Status and Possible Development for CHIMERA Readout and Control SystemIntroduction; The Detectors; The Cs(Tl) crystal; Detector diagnostic; The Electronic Chain; The acquisition system; The Trigger System; The timing circuit; Conclusions; References; Passive Component Modelling with HFSS; Introduction; HFSS-Electromagnetic Simulator Ansoft; Finite Element Method (FEM); Design Flow with HFSS; Draw; Setup Materials; Setup Boundaries / Source; Setup Solution; Post-Processor; HSB2 Technology; Application and Results; Microstrips in metal 3; Microstrip design with HFSS; Results; Conclusions. This volume covers a wide area - from research topics to the design and improvement of integrated circuit devices, already existing or to be introduced to the market. Microelectronics. http://id.loc.gov/authorities/subjects/sh85084822 System design. http://id.loc.gov/authorities/subjects/sh85131736 Microélectronique. Conception de systèmes. microelectronics. aat TECHNOLOGY & ENGINEERING Electronics Digital. bisacsh TECHNOLOGY & ENGINEERING Electronics Microelectronics. bisacsh Microelectronics fast System design fast MICROELECTRONICS. nasat SYSTEMS ENGINEERING. nasat ELECTRONICS. nasat Electronic books. Ferla, Giuseppe. Fortuna, L. (Luigi), 1953- https://id.oclc.org/worldcat/entity/E39PCjvmyM4KF8VtXXCffjkpbm http://id.loc.gov/authorities/names/n91106021 Imbruglia, Antonio. has work: Advanced topics in microelectronics and system design (Text) https://id.oclc.org/worldcat/entity/E39PCGQQHVHr3r9YwDdqx4WbMK https://id.oclc.org/worldcat/ontology/hasWork Print version: Advanced topics in microelectronics and system design. Singapore ; River Edge, NJ : World Scientific, ©2000 9810244576 (DLC) 00048099 (OCoLC)46711088 |
| spellingShingle | Advanced topics in microelectronics and system design / Preface; Analog Layout Area Optimization; Introduction; Experimental Activity; Introduction; Automatic placement tools in ST Microelectronics; Software for areas evaluation; Conclusions; References; Analysis of a Flash Memory Device; Introduction; The Flash Memory Cell; CMOS memories; The MOSFET with a floating gate; Comparison between Flash EPROM and EEPROM memories; Programming and erasing mechanisms; Simulation and Verification Flow; The simulation tool: Powermill; Simulation flow and verification; Electrical and Functional Characteristics of the Device; General Characteristics. Detailed description of signals. Bus operations; Command Interface; Read Operation; The Finite State Machine; Blocks Structure of the Device; Decoding; Pre-decoding and decoding of a column; The Read Path; Sense Amplifier; Program Operation; Instructions definition; Programming; The CUI; The internal microprocessor; The program algorithm; Device simulation; Erase Operation; Starting of the CUI state machine; The erase algorithm; Conclusions; References; VHDL Design, DFT, ATPG & Layout Implementation Service of a Digital Block for a DAC Converter; Introduction; Obtained Results. VHDL Design, DFT & Layout Implementation Service ProjectVHDL Design of DB-DAC Module; Some words about VHDL & synthesis; DAC block description; Convolution algorithm implementation; ROM & RAM mappings; Our architecture of the OVERSAMPLER module; -RAM & ROM memory; -Address generator; -Pre-accumulator; -MAC (Multiplier and Accumulator); -Selector; -Sequencer; -Control Logic; DFT Implementation and ATPG of DB-DAC; Testing of integrated circuits; Fault models; Test pattern; Fault and test coverage; Automatic test patterns generation (ATPG); Design for testability; Scan-path methodology. DFT Implementation flow for DB-DA CDFT Implementation and ATPG of DB-DAC; Scan chain insertion for DB-DAC; Test logic insertion for DB-DAC; Test pattern generation for DB-DAC; Chip Assembly and Layout Implementation; LVS results; Conclusions; References; Improving the ST20C2P Microprocessor: An Introduction; Introduction; The ST20 Microprocessor; Top level; Instruction representation; Instruction encoding; The instruction data value and prefixing; Primary Instruction; Secondary instructions; Grouping; C2P Pipeline Description; Improvement; IBuffer; Conclusions; References. Actual Status and Possible Development for CHIMERA Readout and Control SystemIntroduction; The Detectors; The Cs(Tl) crystal; Detector diagnostic; The Electronic Chain; The acquisition system; The Trigger System; The timing circuit; Conclusions; References; Passive Component Modelling with HFSS; Introduction; HFSS-Electromagnetic Simulator Ansoft; Finite Element Method (FEM); Design Flow with HFSS; Draw; Setup Materials; Setup Boundaries / Source; Setup Solution; Post-Processor; HSB2 Technology; Application and Results; Microstrips in metal 3; Microstrip design with HFSS; Results; Conclusions. Microelectronics. http://id.loc.gov/authorities/subjects/sh85084822 System design. http://id.loc.gov/authorities/subjects/sh85131736 Microélectronique. Conception de systèmes. microelectronics. aat TECHNOLOGY & ENGINEERING Electronics Digital. bisacsh TECHNOLOGY & ENGINEERING Electronics Microelectronics. bisacsh Microelectronics fast System design fast MICROELECTRONICS. nasat SYSTEMS ENGINEERING. nasat ELECTRONICS. nasat |
| subject_GND | http://id.loc.gov/authorities/subjects/sh85084822 http://id.loc.gov/authorities/subjects/sh85131736 |
| title | Advanced topics in microelectronics and system design / |
| title_auth | Advanced topics in microelectronics and system design / |
| title_exact_search | Advanced topics in microelectronics and system design / |
| title_full | Advanced topics in microelectronics and system design / editors, Giuseppe Ferla, Luigi Fortuna, Antonio Imbruglia. |
| title_fullStr | Advanced topics in microelectronics and system design / editors, Giuseppe Ferla, Luigi Fortuna, Antonio Imbruglia. |
| title_full_unstemmed | Advanced topics in microelectronics and system design / editors, Giuseppe Ferla, Luigi Fortuna, Antonio Imbruglia. |
| title_short | Advanced topics in microelectronics and system design / |
| title_sort | advanced topics in microelectronics and system design |
| topic | Microelectronics. http://id.loc.gov/authorities/subjects/sh85084822 System design. http://id.loc.gov/authorities/subjects/sh85131736 Microélectronique. Conception de systèmes. microelectronics. aat TECHNOLOGY & ENGINEERING Electronics Digital. bisacsh TECHNOLOGY & ENGINEERING Electronics Microelectronics. bisacsh Microelectronics fast System design fast MICROELECTRONICS. nasat SYSTEMS ENGINEERING. nasat ELECTRONICS. nasat |
| topic_facet | Microelectronics. System design. Microélectronique. Conception de systèmes. microelectronics. TECHNOLOGY & ENGINEERING Electronics Digital. TECHNOLOGY & ENGINEERING Electronics Microelectronics. Microelectronics System design MICROELECTRONICS. SYSTEMS ENGINEERING. ELECTRONICS. Electronic books. |
| work_keys_str_mv | AT ferlagiuseppe advancedtopicsinmicroelectronicsandsystemdesign AT fortunal advancedtopicsinmicroelectronicsandsystemdesign AT imbrugliaantonio advancedtopicsinmicroelectronicsandsystemdesign |