Advanced topics in microelectronics and system design /:
This volume covers a wide area - from research topics to the design and improvement of integrated circuit devices, already existing or to be introduced to the market.
Gespeichert in:
| Weitere Verfasser: | , , |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Singapore ; River Edge, NJ :
World Scientific,
©2000.
|
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Zusammenfassung: | This volume covers a wide area - from research topics to the design and improvement of integrated circuit devices, already existing or to be introduced to the market. |
| Beschreibung: | 1 online resource (xii, 251 pages) : illustrations |
| Bibliographie: | Includes bibliographical references. |
| ISBN: | 9789812792112 9812792112 |
Internformat
MARC
| LEADER | 00000cam a2200000 a 4500 | ||
|---|---|---|---|
| 001 | ZDB-4-EBA-ocn829713530 | ||
| 003 | OCoLC | ||
| 005 | 20241004212047.0 | ||
| 006 | m o d | ||
| 007 | cr cnu---unuuu | ||
| 008 | 130311s2000 si a ob 000 0 eng d | ||
| 040 | |a N$T |b eng |e pn |c N$T |d IDEBK |d OCLCF |d YDXCP |d EBLCP |d OCLCQ |d AGLDB |d OCLCQ |d VTS |d STF |d AU@ |d M8D |d UKAHL |d OCLCQ |d K6U |d LEAUB |d OCLCQ |d OCLCO |d OCLCQ |d OCLCO |d OCLCL |d SXB |d OCLCQ |d OCLCO | ||
| 019 | |a 853362113 |a 1086518795 | ||
| 020 | |a 9789812792112 |q (electronic bk.) | ||
| 020 | |a 9812792112 |q (electronic bk.) | ||
| 020 | |z 9810244576 | ||
| 020 | |z 9789810244576 | ||
| 035 | |a (OCoLC)829713530 |z (OCoLC)853362113 |z (OCoLC)1086518795 | ||
| 050 | 4 | |a TK7874 |b .A3378 2000eb | |
| 072 | 7 | |a TEC |x 008060 |2 bisacsh | |
| 072 | 7 | |a TEC |x 008070 |2 bisacsh | |
| 082 | 7 | |a 621.381 |2 22 | |
| 049 | |a MAIN | ||
| 245 | 0 | 0 | |a Advanced topics in microelectronics and system design / |c editors, Giuseppe Ferla, Luigi Fortuna, Antonio Imbruglia. |
| 260 | |a Singapore ; |a River Edge, NJ : |b World Scientific, |c ©2000. | ||
| 300 | |a 1 online resource (xii, 251 pages) : |b illustrations | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 504 | |a Includes bibliographical references. | ||
| 588 | 0 | |a Print version record. | |
| 505 | 0 | |a Preface; Analog Layout Area Optimization; Introduction; Experimental Activity; Introduction; Automatic placement tools in ST Microelectronics; Software for areas evaluation; Conclusions; References; Analysis of a Flash Memory Device; Introduction; The Flash Memory Cell; CMOS memories; The MOSFET with a floating gate; Comparison between Flash EPROM and EEPROM memories; Programming and erasing mechanisms; Simulation and Verification Flow; The simulation tool: Powermill; Simulation flow and verification; Electrical and Functional Characteristics of the Device; General Characteristics. | |
| 505 | 8 | |a Detailed description of signals. Bus operations; Command Interface; Read Operation; The Finite State Machine; Blocks Structure of the Device; Decoding; Pre-decoding and decoding of a column; The Read Path; Sense Amplifier; Program Operation; Instructions definition; Programming; The CUI; The internal microprocessor; The program algorithm; Device simulation; Erase Operation; Starting of the CUI state machine; The erase algorithm; Conclusions; References; VHDL Design, DFT, ATPG & Layout Implementation Service of a Digital Block for a DAC Converter; Introduction; Obtained Results. | |
| 505 | 8 | |a VHDL Design, DFT & Layout Implementation Service ProjectVHDL Design of DB-DAC Module; Some words about VHDL & synthesis; DAC block description; Convolution algorithm implementation; ROM & RAM mappings; Our architecture of the OVERSAMPLER module; -RAM & ROM memory; -Address generator; -Pre-accumulator; -MAC (Multiplier and Accumulator); -Selector; -Sequencer; -Control Logic; DFT Implementation and ATPG of DB-DAC; Testing of integrated circuits; Fault models; Test pattern; Fault and test coverage; Automatic test patterns generation (ATPG); Design for testability; Scan-path methodology. | |
| 505 | 8 | |a DFT Implementation flow for DB-DA CDFT Implementation and ATPG of DB-DAC; Scan chain insertion for DB-DAC; Test logic insertion for DB-DAC; Test pattern generation for DB-DAC; Chip Assembly and Layout Implementation; LVS results; Conclusions; References; Improving the ST20C2P Microprocessor: An Introduction; Introduction; The ST20 Microprocessor; Top level; Instruction representation; Instruction encoding; The instruction data value and prefixing; Primary Instruction; Secondary instructions; Grouping; C2P Pipeline Description; Improvement; IBuffer; Conclusions; References. | |
| 505 | 8 | |a Actual Status and Possible Development for CHIMERA Readout and Control SystemIntroduction; The Detectors; The Cs(Tl) crystal; Detector diagnostic; The Electronic Chain; The acquisition system; The Trigger System; The timing circuit; Conclusions; References; Passive Component Modelling with HFSS; Introduction; HFSS-Electromagnetic Simulator Ansoft; Finite Element Method (FEM); Design Flow with HFSS; Draw; Setup Materials; Setup Boundaries / Source; Setup Solution; Post-Processor; HSB2 Technology; Application and Results; Microstrips in metal 3; Microstrip design with HFSS; Results; Conclusions. | |
| 520 | |a This volume covers a wide area - from research topics to the design and improvement of integrated circuit devices, already existing or to be introduced to the market. | ||
| 650 | 0 | |a Microelectronics. |0 http://id.loc.gov/authorities/subjects/sh85084822 | |
| 650 | 0 | |a System design. |0 http://id.loc.gov/authorities/subjects/sh85131736 | |
| 650 | 6 | |a Microélectronique. | |
| 650 | 6 | |a Conception de systèmes. | |
| 650 | 7 | |a microelectronics. |2 aat | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Digital. |2 bisacsh | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Microelectronics. |2 bisacsh | |
| 650 | 7 | |a Microelectronics |2 fast | |
| 650 | 7 | |a System design |2 fast | |
| 650 | 7 | |a MICROELECTRONICS. |2 nasat | |
| 650 | 7 | |a SYSTEMS ENGINEERING. |2 nasat | |
| 650 | 7 | |a ELECTRONICS. |2 nasat | |
| 700 | 1 | |a Ferla, Giuseppe. | |
| 700 | 1 | |a Fortuna, L. |q (Luigi), |d 1953- |1 https://id.oclc.org/worldcat/entity/E39PCjvmyM4KF8VtXXCffjkpbm |0 http://id.loc.gov/authorities/names/n91106021 | |
| 700 | 1 | |a Imbruglia, Antonio. | |
| 758 | |i has work: |a Advanced topics in microelectronics and system design (Text) |1 https://id.oclc.org/worldcat/entity/E39PCGQQHVHr3r9YwDdqx4WbMK |4 https://id.oclc.org/worldcat/ontology/hasWork | ||
| 776 | 0 | 8 | |i Print version: |t Advanced topics in microelectronics and system design. |d Singapore ; River Edge, NJ : World Scientific, ©2000 |z 9810244576 |w (DLC) 00048099 |w (OCoLC)46711088 |
| 856 | 4 | 0 | |l FWS01 |p ZDB-4-EBA |q FWS_PDA_EBA |u https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=532556 |3 Volltext |
| 938 | |a Askews and Holts Library Services |b ASKH |n AH24684993 | ||
| 938 | |a ProQuest Ebook Central |b EBLB |n EBL1223874 | ||
| 938 | |a EBSCOhost |b EBSC |n 532556 | ||
| 938 | |a ProQuest MyiLibrary Digital eBook Collection |b IDEB |n cis25471724 | ||
| 938 | |a YBP Library Services |b YANK |n 10252797 | ||
| 994 | |a 92 |b GEBAY | ||
| 912 | |a ZDB-4-EBA | ||
| 049 | |a DE-863 | ||
Datensatz im Suchindex
| DE-BY-FWS_katkey | ZDB-4-EBA-ocn829713530 |
|---|---|
| _version_ | 1816882224690102272 |
| adam_text | |
| any_adam_object | |
| author2 | Ferla, Giuseppe Fortuna, L. (Luigi), 1953- Imbruglia, Antonio |
| author2_role | |
| author2_variant | g f gf l f lf a i ai |
| author_GND | http://id.loc.gov/authorities/names/n91106021 |
| author_facet | Ferla, Giuseppe Fortuna, L. (Luigi), 1953- Imbruglia, Antonio |
| author_sort | Ferla, Giuseppe |
| building | Verbundindex |
| bvnumber | localFWS |
| callnumber-first | T - Technology |
| callnumber-label | TK7874 |
| callnumber-raw | TK7874 .A3378 2000eb |
| callnumber-search | TK7874 .A3378 2000eb |
| callnumber-sort | TK 47874 A3378 42000EB |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| collection | ZDB-4-EBA |
| contents | Preface; Analog Layout Area Optimization; Introduction; Experimental Activity; Introduction; Automatic placement tools in ST Microelectronics; Software for areas evaluation; Conclusions; References; Analysis of a Flash Memory Device; Introduction; The Flash Memory Cell; CMOS memories; The MOSFET with a floating gate; Comparison between Flash EPROM and EEPROM memories; Programming and erasing mechanisms; Simulation and Verification Flow; The simulation tool: Powermill; Simulation flow and verification; Electrical and Functional Characteristics of the Device; General Characteristics. Detailed description of signals. Bus operations; Command Interface; Read Operation; The Finite State Machine; Blocks Structure of the Device; Decoding; Pre-decoding and decoding of a column; The Read Path; Sense Amplifier; Program Operation; Instructions definition; Programming; The CUI; The internal microprocessor; The program algorithm; Device simulation; Erase Operation; Starting of the CUI state machine; The erase algorithm; Conclusions; References; VHDL Design, DFT, ATPG & Layout Implementation Service of a Digital Block for a DAC Converter; Introduction; Obtained Results. VHDL Design, DFT & Layout Implementation Service ProjectVHDL Design of DB-DAC Module; Some words about VHDL & synthesis; DAC block description; Convolution algorithm implementation; ROM & RAM mappings; Our architecture of the OVERSAMPLER module; -RAM & ROM memory; -Address generator; -Pre-accumulator; -MAC (Multiplier and Accumulator); -Selector; -Sequencer; -Control Logic; DFT Implementation and ATPG of DB-DAC; Testing of integrated circuits; Fault models; Test pattern; Fault and test coverage; Automatic test patterns generation (ATPG); Design for testability; Scan-path methodology. DFT Implementation flow for DB-DA CDFT Implementation and ATPG of DB-DAC; Scan chain insertion for DB-DAC; Test logic insertion for DB-DAC; Test pattern generation for DB-DAC; Chip Assembly and Layout Implementation; LVS results; Conclusions; References; Improving the ST20C2P Microprocessor: An Introduction; Introduction; The ST20 Microprocessor; Top level; Instruction representation; Instruction encoding; The instruction data value and prefixing; Primary Instruction; Secondary instructions; Grouping; C2P Pipeline Description; Improvement; IBuffer; Conclusions; References. Actual Status and Possible Development for CHIMERA Readout and Control SystemIntroduction; The Detectors; The Cs(Tl) crystal; Detector diagnostic; The Electronic Chain; The acquisition system; The Trigger System; The timing circuit; Conclusions; References; Passive Component Modelling with HFSS; Introduction; HFSS-Electromagnetic Simulator Ansoft; Finite Element Method (FEM); Design Flow with HFSS; Draw; Setup Materials; Setup Boundaries / Source; Setup Solution; Post-Processor; HSB2 Technology; Application and Results; Microstrips in metal 3; Microstrip design with HFSS; Results; Conclusions. |
| ctrlnum | (OCoLC)829713530 |
| dewey-full | 621.381 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.381 |
| dewey-search | 621.381 |
| dewey-sort | 3621.381 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>06180cam a2200697 a 4500</leader><controlfield tag="001">ZDB-4-EBA-ocn829713530</controlfield><controlfield tag="003">OCoLC</controlfield><controlfield tag="005">20241004212047.0</controlfield><controlfield tag="006">m o d </controlfield><controlfield tag="007">cr cnu---unuuu</controlfield><controlfield tag="008">130311s2000 si a ob 000 0 eng d</controlfield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">N$T</subfield><subfield code="b">eng</subfield><subfield code="e">pn</subfield><subfield code="c">N$T</subfield><subfield code="d">IDEBK</subfield><subfield code="d">OCLCF</subfield><subfield code="d">YDXCP</subfield><subfield code="d">EBLCP</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">AGLDB</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">VTS</subfield><subfield code="d">STF</subfield><subfield code="d">AU@</subfield><subfield code="d">M8D</subfield><subfield code="d">UKAHL</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">K6U</subfield><subfield code="d">LEAUB</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">OCLCO</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">OCLCO</subfield><subfield code="d">OCLCL</subfield><subfield code="d">SXB</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">OCLCO</subfield></datafield><datafield tag="019" ind1=" " ind2=" "><subfield code="a">853362113</subfield><subfield code="a">1086518795</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9789812792112</subfield><subfield code="q">(electronic bk.)</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9812792112</subfield><subfield code="q">(electronic bk.)</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="z">9810244576</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="z">9789810244576</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)829713530</subfield><subfield code="z">(OCoLC)853362113</subfield><subfield code="z">(OCoLC)1086518795</subfield></datafield><datafield tag="050" ind1=" " ind2="4"><subfield code="a">TK7874</subfield><subfield code="b">.A3378 2000eb</subfield></datafield><datafield tag="072" ind1=" " ind2="7"><subfield code="a">TEC</subfield><subfield code="x">008060</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="072" ind1=" " ind2="7"><subfield code="a">TEC</subfield><subfield code="x">008070</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="082" ind1="7" ind2=" "><subfield code="a">621.381</subfield><subfield code="2">22</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">MAIN</subfield></datafield><datafield tag="245" ind1="0" ind2="0"><subfield code="a">Advanced topics in microelectronics and system design /</subfield><subfield code="c">editors, Giuseppe Ferla, Luigi Fortuna, Antonio Imbruglia.</subfield></datafield><datafield tag="260" ind1=" " ind2=" "><subfield code="a">Singapore ;</subfield><subfield code="a">River Edge, NJ :</subfield><subfield code="b">World Scientific,</subfield><subfield code="c">©2000.</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 online resource (xii, 251 pages) :</subfield><subfield code="b">illustrations</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="a">text</subfield><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="a">computer</subfield><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="a">online resource</subfield><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="504" ind1=" " ind2=" "><subfield code="a">Includes bibliographical references.</subfield></datafield><datafield tag="588" ind1="0" ind2=" "><subfield code="a">Print version record.</subfield></datafield><datafield tag="505" ind1="0" ind2=" "><subfield code="a">Preface; Analog Layout Area Optimization; Introduction; Experimental Activity; Introduction; Automatic placement tools in ST Microelectronics; Software for areas evaluation; Conclusions; References; Analysis of a Flash Memory Device; Introduction; The Flash Memory Cell; CMOS memories; The MOSFET with a floating gate; Comparison between Flash EPROM and EEPROM memories; Programming and erasing mechanisms; Simulation and Verification Flow; The simulation tool: Powermill; Simulation flow and verification; Electrical and Functional Characteristics of the Device; General Characteristics.</subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">Detailed description of signals. Bus operations; Command Interface; Read Operation; The Finite State Machine; Blocks Structure of the Device; Decoding; Pre-decoding and decoding of a column; The Read Path; Sense Amplifier; Program Operation; Instructions definition; Programming; The CUI; The internal microprocessor; The program algorithm; Device simulation; Erase Operation; Starting of the CUI state machine; The erase algorithm; Conclusions; References; VHDL Design, DFT, ATPG & Layout Implementation Service of a Digital Block for a DAC Converter; Introduction; Obtained Results.</subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">VHDL Design, DFT & Layout Implementation Service ProjectVHDL Design of DB-DAC Module; Some words about VHDL & synthesis; DAC block description; Convolution algorithm implementation; ROM & RAM mappings; Our architecture of the OVERSAMPLER module; -RAM & ROM memory; -Address generator; -Pre-accumulator; -MAC (Multiplier and Accumulator); -Selector; -Sequencer; -Control Logic; DFT Implementation and ATPG of DB-DAC; Testing of integrated circuits; Fault models; Test pattern; Fault and test coverage; Automatic test patterns generation (ATPG); Design for testability; Scan-path methodology.</subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">DFT Implementation flow for DB-DA CDFT Implementation and ATPG of DB-DAC; Scan chain insertion for DB-DAC; Test logic insertion for DB-DAC; Test pattern generation for DB-DAC; Chip Assembly and Layout Implementation; LVS results; Conclusions; References; Improving the ST20C2P Microprocessor: An Introduction; Introduction; The ST20 Microprocessor; Top level; Instruction representation; Instruction encoding; The instruction data value and prefixing; Primary Instruction; Secondary instructions; Grouping; C2P Pipeline Description; Improvement; IBuffer; Conclusions; References.</subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">Actual Status and Possible Development for CHIMERA Readout and Control SystemIntroduction; The Detectors; The Cs(Tl) crystal; Detector diagnostic; The Electronic Chain; The acquisition system; The Trigger System; The timing circuit; Conclusions; References; Passive Component Modelling with HFSS; Introduction; HFSS-Electromagnetic Simulator Ansoft; Finite Element Method (FEM); Design Flow with HFSS; Draw; Setup Materials; Setup Boundaries / Source; Setup Solution; Post-Processor; HSB2 Technology; Application and Results; Microstrips in metal 3; Microstrip design with HFSS; Results; Conclusions.</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">This volume covers a wide area - from research topics to the design and improvement of integrated circuit devices, already existing or to be introduced to the market.</subfield></datafield><datafield tag="650" ind1=" " ind2="0"><subfield code="a">Microelectronics.</subfield><subfield code="0">http://id.loc.gov/authorities/subjects/sh85084822</subfield></datafield><datafield tag="650" ind1=" " ind2="0"><subfield code="a">System design.</subfield><subfield code="0">http://id.loc.gov/authorities/subjects/sh85131736</subfield></datafield><datafield tag="650" ind1=" " ind2="6"><subfield code="a">Microélectronique.</subfield></datafield><datafield tag="650" ind1=" " ind2="6"><subfield code="a">Conception de systèmes.</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">microelectronics.</subfield><subfield code="2">aat</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">TECHNOLOGY & ENGINEERING</subfield><subfield code="x">Electronics</subfield><subfield code="x">Digital.</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">TECHNOLOGY & ENGINEERING</subfield><subfield code="x">Electronics</subfield><subfield code="x">Microelectronics.</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Microelectronics</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">System design</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">MICROELECTRONICS.</subfield><subfield code="2">nasat</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">SYSTEMS ENGINEERING.</subfield><subfield code="2">nasat</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">ELECTRONICS.</subfield><subfield code="2">nasat</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Ferla, Giuseppe.</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Fortuna, L.</subfield><subfield code="q">(Luigi),</subfield><subfield code="d">1953-</subfield><subfield code="1">https://id.oclc.org/worldcat/entity/E39PCjvmyM4KF8VtXXCffjkpbm</subfield><subfield code="0">http://id.loc.gov/authorities/names/n91106021</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Imbruglia, Antonio.</subfield></datafield><datafield tag="758" ind1=" " ind2=" "><subfield code="i">has work:</subfield><subfield code="a">Advanced topics in microelectronics and system design (Text)</subfield><subfield code="1">https://id.oclc.org/worldcat/entity/E39PCGQQHVHr3r9YwDdqx4WbMK</subfield><subfield code="4">https://id.oclc.org/worldcat/ontology/hasWork</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Print version:</subfield><subfield code="t">Advanced topics in microelectronics and system design.</subfield><subfield code="d">Singapore ; River Edge, NJ : World Scientific, ©2000</subfield><subfield code="z">9810244576</subfield><subfield code="w">(DLC) 00048099</subfield><subfield code="w">(OCoLC)46711088</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="l">FWS01</subfield><subfield code="p">ZDB-4-EBA</subfield><subfield code="q">FWS_PDA_EBA</subfield><subfield code="u">https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=532556</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">Askews and Holts Library Services</subfield><subfield code="b">ASKH</subfield><subfield code="n">AH24684993</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">ProQuest Ebook Central</subfield><subfield code="b">EBLB</subfield><subfield code="n">EBL1223874</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">EBSCOhost</subfield><subfield code="b">EBSC</subfield><subfield code="n">532556</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">ProQuest MyiLibrary Digital eBook Collection</subfield><subfield code="b">IDEB</subfield><subfield code="n">cis25471724</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">YBP Library Services</subfield><subfield code="b">YANK</subfield><subfield code="n">10252797</subfield></datafield><datafield tag="994" ind1=" " ind2=" "><subfield code="a">92</subfield><subfield code="b">GEBAY</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-4-EBA</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-863</subfield></datafield></record></collection> |
| id | ZDB-4-EBA-ocn829713530 |
| illustrated | Illustrated |
| indexdate | 2024-11-27T13:25:13Z |
| institution | BVB |
| isbn | 9789812792112 9812792112 |
| language | English |
| oclc_num | 829713530 |
| open_access_boolean | |
| owner | MAIN DE-863 DE-BY-FWS |
| owner_facet | MAIN DE-863 DE-BY-FWS |
| physical | 1 online resource (xii, 251 pages) : illustrations |
| psigel | ZDB-4-EBA |
| publishDate | 2000 |
| publishDateSearch | 2000 |
| publishDateSort | 2000 |
| publisher | World Scientific, |
| record_format | marc |
| spelling | Advanced topics in microelectronics and system design / editors, Giuseppe Ferla, Luigi Fortuna, Antonio Imbruglia. Singapore ; River Edge, NJ : World Scientific, ©2000. 1 online resource (xii, 251 pages) : illustrations text txt rdacontent computer c rdamedia online resource cr rdacarrier Includes bibliographical references. Print version record. Preface; Analog Layout Area Optimization; Introduction; Experimental Activity; Introduction; Automatic placement tools in ST Microelectronics; Software for areas evaluation; Conclusions; References; Analysis of a Flash Memory Device; Introduction; The Flash Memory Cell; CMOS memories; The MOSFET with a floating gate; Comparison between Flash EPROM and EEPROM memories; Programming and erasing mechanisms; Simulation and Verification Flow; The simulation tool: Powermill; Simulation flow and verification; Electrical and Functional Characteristics of the Device; General Characteristics. Detailed description of signals. Bus operations; Command Interface; Read Operation; The Finite State Machine; Blocks Structure of the Device; Decoding; Pre-decoding and decoding of a column; The Read Path; Sense Amplifier; Program Operation; Instructions definition; Programming; The CUI; The internal microprocessor; The program algorithm; Device simulation; Erase Operation; Starting of the CUI state machine; The erase algorithm; Conclusions; References; VHDL Design, DFT, ATPG & Layout Implementation Service of a Digital Block for a DAC Converter; Introduction; Obtained Results. VHDL Design, DFT & Layout Implementation Service ProjectVHDL Design of DB-DAC Module; Some words about VHDL & synthesis; DAC block description; Convolution algorithm implementation; ROM & RAM mappings; Our architecture of the OVERSAMPLER module; -RAM & ROM memory; -Address generator; -Pre-accumulator; -MAC (Multiplier and Accumulator); -Selector; -Sequencer; -Control Logic; DFT Implementation and ATPG of DB-DAC; Testing of integrated circuits; Fault models; Test pattern; Fault and test coverage; Automatic test patterns generation (ATPG); Design for testability; Scan-path methodology. DFT Implementation flow for DB-DA CDFT Implementation and ATPG of DB-DAC; Scan chain insertion for DB-DAC; Test logic insertion for DB-DAC; Test pattern generation for DB-DAC; Chip Assembly and Layout Implementation; LVS results; Conclusions; References; Improving the ST20C2P Microprocessor: An Introduction; Introduction; The ST20 Microprocessor; Top level; Instruction representation; Instruction encoding; The instruction data value and prefixing; Primary Instruction; Secondary instructions; Grouping; C2P Pipeline Description; Improvement; IBuffer; Conclusions; References. Actual Status and Possible Development for CHIMERA Readout and Control SystemIntroduction; The Detectors; The Cs(Tl) crystal; Detector diagnostic; The Electronic Chain; The acquisition system; The Trigger System; The timing circuit; Conclusions; References; Passive Component Modelling with HFSS; Introduction; HFSS-Electromagnetic Simulator Ansoft; Finite Element Method (FEM); Design Flow with HFSS; Draw; Setup Materials; Setup Boundaries / Source; Setup Solution; Post-Processor; HSB2 Technology; Application and Results; Microstrips in metal 3; Microstrip design with HFSS; Results; Conclusions. This volume covers a wide area - from research topics to the design and improvement of integrated circuit devices, already existing or to be introduced to the market. Microelectronics. http://id.loc.gov/authorities/subjects/sh85084822 System design. http://id.loc.gov/authorities/subjects/sh85131736 Microélectronique. Conception de systèmes. microelectronics. aat TECHNOLOGY & ENGINEERING Electronics Digital. bisacsh TECHNOLOGY & ENGINEERING Electronics Microelectronics. bisacsh Microelectronics fast System design fast MICROELECTRONICS. nasat SYSTEMS ENGINEERING. nasat ELECTRONICS. nasat Ferla, Giuseppe. Fortuna, L. (Luigi), 1953- https://id.oclc.org/worldcat/entity/E39PCjvmyM4KF8VtXXCffjkpbm http://id.loc.gov/authorities/names/n91106021 Imbruglia, Antonio. has work: Advanced topics in microelectronics and system design (Text) https://id.oclc.org/worldcat/entity/E39PCGQQHVHr3r9YwDdqx4WbMK https://id.oclc.org/worldcat/ontology/hasWork Print version: Advanced topics in microelectronics and system design. Singapore ; River Edge, NJ : World Scientific, ©2000 9810244576 (DLC) 00048099 (OCoLC)46711088 FWS01 ZDB-4-EBA FWS_PDA_EBA https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=532556 Volltext |
| spellingShingle | Advanced topics in microelectronics and system design / Preface; Analog Layout Area Optimization; Introduction; Experimental Activity; Introduction; Automatic placement tools in ST Microelectronics; Software for areas evaluation; Conclusions; References; Analysis of a Flash Memory Device; Introduction; The Flash Memory Cell; CMOS memories; The MOSFET with a floating gate; Comparison between Flash EPROM and EEPROM memories; Programming and erasing mechanisms; Simulation and Verification Flow; The simulation tool: Powermill; Simulation flow and verification; Electrical and Functional Characteristics of the Device; General Characteristics. Detailed description of signals. Bus operations; Command Interface; Read Operation; The Finite State Machine; Blocks Structure of the Device; Decoding; Pre-decoding and decoding of a column; The Read Path; Sense Amplifier; Program Operation; Instructions definition; Programming; The CUI; The internal microprocessor; The program algorithm; Device simulation; Erase Operation; Starting of the CUI state machine; The erase algorithm; Conclusions; References; VHDL Design, DFT, ATPG & Layout Implementation Service of a Digital Block for a DAC Converter; Introduction; Obtained Results. VHDL Design, DFT & Layout Implementation Service ProjectVHDL Design of DB-DAC Module; Some words about VHDL & synthesis; DAC block description; Convolution algorithm implementation; ROM & RAM mappings; Our architecture of the OVERSAMPLER module; -RAM & ROM memory; -Address generator; -Pre-accumulator; -MAC (Multiplier and Accumulator); -Selector; -Sequencer; -Control Logic; DFT Implementation and ATPG of DB-DAC; Testing of integrated circuits; Fault models; Test pattern; Fault and test coverage; Automatic test patterns generation (ATPG); Design for testability; Scan-path methodology. DFT Implementation flow for DB-DA CDFT Implementation and ATPG of DB-DAC; Scan chain insertion for DB-DAC; Test logic insertion for DB-DAC; Test pattern generation for DB-DAC; Chip Assembly and Layout Implementation; LVS results; Conclusions; References; Improving the ST20C2P Microprocessor: An Introduction; Introduction; The ST20 Microprocessor; Top level; Instruction representation; Instruction encoding; The instruction data value and prefixing; Primary Instruction; Secondary instructions; Grouping; C2P Pipeline Description; Improvement; IBuffer; Conclusions; References. Actual Status and Possible Development for CHIMERA Readout and Control SystemIntroduction; The Detectors; The Cs(Tl) crystal; Detector diagnostic; The Electronic Chain; The acquisition system; The Trigger System; The timing circuit; Conclusions; References; Passive Component Modelling with HFSS; Introduction; HFSS-Electromagnetic Simulator Ansoft; Finite Element Method (FEM); Design Flow with HFSS; Draw; Setup Materials; Setup Boundaries / Source; Setup Solution; Post-Processor; HSB2 Technology; Application and Results; Microstrips in metal 3; Microstrip design with HFSS; Results; Conclusions. Microelectronics. http://id.loc.gov/authorities/subjects/sh85084822 System design. http://id.loc.gov/authorities/subjects/sh85131736 Microélectronique. Conception de systèmes. microelectronics. aat TECHNOLOGY & ENGINEERING Electronics Digital. bisacsh TECHNOLOGY & ENGINEERING Electronics Microelectronics. bisacsh Microelectronics fast System design fast MICROELECTRONICS. nasat SYSTEMS ENGINEERING. nasat ELECTRONICS. nasat |
| subject_GND | http://id.loc.gov/authorities/subjects/sh85084822 http://id.loc.gov/authorities/subjects/sh85131736 |
| title | Advanced topics in microelectronics and system design / |
| title_auth | Advanced topics in microelectronics and system design / |
| title_exact_search | Advanced topics in microelectronics and system design / |
| title_full | Advanced topics in microelectronics and system design / editors, Giuseppe Ferla, Luigi Fortuna, Antonio Imbruglia. |
| title_fullStr | Advanced topics in microelectronics and system design / editors, Giuseppe Ferla, Luigi Fortuna, Antonio Imbruglia. |
| title_full_unstemmed | Advanced topics in microelectronics and system design / editors, Giuseppe Ferla, Luigi Fortuna, Antonio Imbruglia. |
| title_short | Advanced topics in microelectronics and system design / |
| title_sort | advanced topics in microelectronics and system design |
| topic | Microelectronics. http://id.loc.gov/authorities/subjects/sh85084822 System design. http://id.loc.gov/authorities/subjects/sh85131736 Microélectronique. Conception de systèmes. microelectronics. aat TECHNOLOGY & ENGINEERING Electronics Digital. bisacsh TECHNOLOGY & ENGINEERING Electronics Microelectronics. bisacsh Microelectronics fast System design fast MICROELECTRONICS. nasat SYSTEMS ENGINEERING. nasat ELECTRONICS. nasat |
| topic_facet | Microelectronics. System design. Microélectronique. Conception de systèmes. microelectronics. TECHNOLOGY & ENGINEERING Electronics Digital. TECHNOLOGY & ENGINEERING Electronics Microelectronics. Microelectronics System design MICROELECTRONICS. SYSTEMS ENGINEERING. ELECTRONICS. |
| url | https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=532556 |
| work_keys_str_mv | AT ferlagiuseppe advancedtopicsinmicroelectronicsandsystemdesign AT fortunal advancedtopicsinmicroelectronicsandsystemdesign AT imbrugliaantonio advancedtopicsinmicroelectronicsandsystemdesign |