Neural networks and systolic array design /:
Neural networks (NNs) and systolic arrays (SAs) have many similar features. This volume describes, in a unified way, the basic concepts, theories and characteristic features of integrating or formulating different facets of NNs and SAs, as well as presents recent developments and significant applica...
Gespeichert in:
| Weitere Verfasser: | , |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
River Edge, N.J. :
World Scientific,
©2002.
|
| Schriftenreihe: | Series in machine perception and artificial intelligence ;
v. 49. |
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Zusammenfassung: | Neural networks (NNs) and systolic arrays (SAs) have many similar features. This volume describes, in a unified way, the basic concepts, theories and characteristic features of integrating or formulating different facets of NNs and SAs, as well as presents recent developments and significant applications. The articles, written by experts from all over the world, demonstrate the various ways this integration can be made to efficiently design methodologies, algorithms and architectures, and also implementations, for NN applications. The book will be useful to graduate students and researchers in many related areas, not only as a reference book but also as a textbook for some parts of the curriculum. It will also benefit researchers and practitioners in industry and R & D laboratories who are working in the fields of system design, VLSI, parallel processing, neural networks, and vision. |
| Beschreibung: | 1 online resource (xiv, 405 pages) : illustrations |
| Bibliographie: | Includes bibliographical references and index. |
| ISBN: | 9789812778086 981277808X 1281929891 9781281929891 9786611929893 6611929894 |
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| 504 | |a Includes bibliographical references and index. | ||
| 505 | 0 | 0 | |g Ch. 1. |t Neural networks and systolic arrays: models and integration / |r D. Zhang and S.K. Pal -- |g Ch. 2. |t Systolic array methodology for a neural model to solve the mixture problem / |r R.M. Pérez [and others] -- |g Ch. 3. |t Morphological endmember identification and its systolic array design / |r P.L Aguilar [and others] -- |g Ch. 4. |t MANTRA I: a systolic array for neural computation / |r M.A. Viredaz and P. Ienne -- |g Ch. 5. |t Mixed-signal neuro-fuzzy processor implementations: sequential architectures and circuit-level description / |r J. Madrenas and E. Alarcón -- |g Ch. 6. |t CMAC neural networks and systolic implementation / |r B.D. Lui, Y.H. Kuo and J.S. Ker -- |g Ch. 7. |t Quadrant interlocking factorization on systolic and wavefront array processors / |r M.P. Bekakos, O.B. Efremides and D.J. Evans -- |g Ch. 8. |t Systolic S.O.M. neural network for hyperspectral image classification / |r P. Martinez [and others]. |
| 505 | 0 | 0 | |g Ch. 9. |t Optimizing and learning algorithm for feedforward neural networks and its implementation by systolic array / |r P.B. Burgos -- |g Ch. 10. |t Parallel ANN architecture for fuzzy patterns / |r D. Zhang and S.K. Pal -- |g Ch. 11. |t Pipelined systolic arrays for time-delay neural networks / |r D. Zhang and S.K. Pal -- |g Ch. 12. |t An integrated intelligent classification engine (I[superscript 2]CE for biosignal engineering / |r A.N. Kastania and M.P. Bekakos -- |g Ch. 13. |t Multiplierless designs for artificial neural networks / |r H.K. Kwan -- |g Ch. 14. |t A VLSI system for intelligent decision making in real-time / |r N. Ranganathan and M.I. Patel -- |g Ch. 15. |t Reconfigurable hardware systolic array for real-time compartmental modeling of large-scale artificial nervous systems / |r M. Korkin -- |g Ch. 16. |t Implementing and mapping ANNs on reconfigurable mesh massively parallel architectures / |r W.N. Li and J.J. Jenq. |
| 588 | 0 | |a Print version record. | |
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| 546 | |a English. | ||
| 650 | 0 | |a Neural networks (Computer science) |0 http://id.loc.gov/authorities/subjects/sh90001937 | |
| 650 | 0 | |a Systolic array circuits |x Design and construction. | |
| 650 | 2 | |a Neural Networks, Computer |0 https://id.nlm.nih.gov/mesh/D016571 | |
| 650 | 6 | |a Réseaux neuronaux (Informatique) | |
| 650 | 7 | |a COMPUTERS |x Neural Networks. |2 bisacsh | |
| 650 | 7 | |a Neural networks (Computer science) |2 fast | |
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| author_additional | D. Zhang and S.K. Pal -- R.M. Pérez [and others] -- P.L Aguilar [and others] -- M.A. Viredaz and P. Ienne -- J. Madrenas and E. Alarcón -- B.D. Lui, Y.H. Kuo and J.S. Ker -- M.P. Bekakos, O.B. Efremides and D.J. Evans -- P. Martinez [and others]. P.B. Burgos -- A.N. Kastania and M.P. Bekakos -- H.K. Kwan -- N. Ranganathan and M.I. Patel -- M. Korkin -- W.N. Li and J.J. Jenq. |
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| contents | Neural networks and systolic arrays: models and integration / Systolic array methodology for a neural model to solve the mixture problem / Morphological endmember identification and its systolic array design / MANTRA I: a systolic array for neural computation / Mixed-signal neuro-fuzzy processor implementations: sequential architectures and circuit-level description / CMAC neural networks and systolic implementation / Quadrant interlocking factorization on systolic and wavefront array processors / Systolic S.O.M. neural network for hyperspectral image classification / Optimizing and learning algorithm for feedforward neural networks and its implementation by systolic array / Parallel ANN architecture for fuzzy patterns / Pipelined systolic arrays for time-delay neural networks / An integrated intelligent classification engine (I[superscript 2]CE for biosignal engineering / Multiplierless designs for artificial neural networks / A VLSI system for intelligent decision making in real-time / Reconfigurable hardware systolic array for real-time compartmental modeling of large-scale artificial nervous systems / Implementing and mapping ANNs on reconfigurable mesh massively parallel architectures / |
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| indexdate | 2024-10-25T16:21:13Z |
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| series | Series in machine perception and artificial intelligence ; |
| series2 | Series in machine perception and artificial intelligence ; |
| spelling | Neural networks and systolic array design / editors, David Zhang, Sankar K. Pal. River Edge, N.J. : World Scientific, ©2002. 1 online resource (xiv, 405 pages) : illustrations text txt rdacontent computer c rdamedia online resource cr rdacarrier Series in machine perception and artificial intelligence ; v. 49 Includes bibliographical references and index. Ch. 1. Neural networks and systolic arrays: models and integration / D. Zhang and S.K. Pal -- Ch. 2. Systolic array methodology for a neural model to solve the mixture problem / R.M. Pérez [and others] -- Ch. 3. Morphological endmember identification and its systolic array design / P.L Aguilar [and others] -- Ch. 4. MANTRA I: a systolic array for neural computation / M.A. Viredaz and P. Ienne -- Ch. 5. Mixed-signal neuro-fuzzy processor implementations: sequential architectures and circuit-level description / J. Madrenas and E. Alarcón -- Ch. 6. CMAC neural networks and systolic implementation / B.D. Lui, Y.H. Kuo and J.S. Ker -- Ch. 7. Quadrant interlocking factorization on systolic and wavefront array processors / M.P. Bekakos, O.B. Efremides and D.J. Evans -- Ch. 8. Systolic S.O.M. neural network for hyperspectral image classification / P. Martinez [and others]. Ch. 9. Optimizing and learning algorithm for feedforward neural networks and its implementation by systolic array / P.B. Burgos -- Ch. 10. Parallel ANN architecture for fuzzy patterns / D. Zhang and S.K. Pal -- Ch. 11. Pipelined systolic arrays for time-delay neural networks / D. Zhang and S.K. Pal -- Ch. 12. An integrated intelligent classification engine (I[superscript 2]CE for biosignal engineering / A.N. Kastania and M.P. Bekakos -- Ch. 13. Multiplierless designs for artificial neural networks / H.K. Kwan -- Ch. 14. A VLSI system for intelligent decision making in real-time / N. Ranganathan and M.I. Patel -- Ch. 15. Reconfigurable hardware systolic array for real-time compartmental modeling of large-scale artificial nervous systems / M. Korkin -- Ch. 16. Implementing and mapping ANNs on reconfigurable mesh massively parallel architectures / W.N. Li and J.J. Jenq. Print version record. Neural networks (NNs) and systolic arrays (SAs) have many similar features. This volume describes, in a unified way, the basic concepts, theories and characteristic features of integrating or formulating different facets of NNs and SAs, as well as presents recent developments and significant applications. The articles, written by experts from all over the world, demonstrate the various ways this integration can be made to efficiently design methodologies, algorithms and architectures, and also implementations, for NN applications. The book will be useful to graduate students and researchers in many related areas, not only as a reference book but also as a textbook for some parts of the curriculum. It will also benefit researchers and practitioners in industry and R & D laboratories who are working in the fields of system design, VLSI, parallel processing, neural networks, and vision. English. Neural networks (Computer science) http://id.loc.gov/authorities/subjects/sh90001937 Systolic array circuits Design and construction. Neural Networks, Computer https://id.nlm.nih.gov/mesh/D016571 Réseaux neuronaux (Informatique) COMPUTERS Neural Networks. bisacsh Neural networks (Computer science) fast Systolic array circuits Design and construction fast Zhang, David, 1949- https://id.oclc.org/worldcat/entity/E39PBJfx6DmMJxbGyY3mmcmDbd http://id.loc.gov/authorities/names/n98076043 Pal, Sankar K. has work: Neural networks and systolic array design (Text) https://id.oclc.org/worldcat/entity/E39PCGfwrXpr3KFDDQppwVdgmm https://id.oclc.org/worldcat/ontology/hasWork Print version: Neural networks and systolic array design. River Edge, N.J. : World Scientific, ©2002 9810248407 (DLC) 2005297912 (OCoLC)50701826 Series in machine perception and artificial intelligence ; v. 49. http://id.loc.gov/authorities/names/n91107585 FWS01 ZDB-4-EBA FWS_PDA_EBA https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=514253 Volltext CBO01 ZDB-4-EBA FWS_PDA_EBA https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=514253 Volltext |
| spellingShingle | Neural networks and systolic array design / Series in machine perception and artificial intelligence ; Neural networks and systolic arrays: models and integration / Systolic array methodology for a neural model to solve the mixture problem / Morphological endmember identification and its systolic array design / MANTRA I: a systolic array for neural computation / Mixed-signal neuro-fuzzy processor implementations: sequential architectures and circuit-level description / CMAC neural networks and systolic implementation / Quadrant interlocking factorization on systolic and wavefront array processors / Systolic S.O.M. neural network for hyperspectral image classification / Optimizing and learning algorithm for feedforward neural networks and its implementation by systolic array / Parallel ANN architecture for fuzzy patterns / Pipelined systolic arrays for time-delay neural networks / An integrated intelligent classification engine (I[superscript 2]CE for biosignal engineering / Multiplierless designs for artificial neural networks / A VLSI system for intelligent decision making in real-time / Reconfigurable hardware systolic array for real-time compartmental modeling of large-scale artificial nervous systems / Implementing and mapping ANNs on reconfigurable mesh massively parallel architectures / Neural networks (Computer science) http://id.loc.gov/authorities/subjects/sh90001937 Systolic array circuits Design and construction. Neural Networks, Computer https://id.nlm.nih.gov/mesh/D016571 Réseaux neuronaux (Informatique) COMPUTERS Neural Networks. bisacsh Neural networks (Computer science) fast Systolic array circuits Design and construction fast |
| subject_GND | http://id.loc.gov/authorities/subjects/sh90001937 https://id.nlm.nih.gov/mesh/D016571 |
| title | Neural networks and systolic array design / |
| title_alt | Neural networks and systolic arrays: models and integration / Systolic array methodology for a neural model to solve the mixture problem / Morphological endmember identification and its systolic array design / MANTRA I: a systolic array for neural computation / Mixed-signal neuro-fuzzy processor implementations: sequential architectures and circuit-level description / CMAC neural networks and systolic implementation / Quadrant interlocking factorization on systolic and wavefront array processors / Systolic S.O.M. neural network for hyperspectral image classification / Optimizing and learning algorithm for feedforward neural networks and its implementation by systolic array / Parallel ANN architecture for fuzzy patterns / Pipelined systolic arrays for time-delay neural networks / An integrated intelligent classification engine (I[superscript 2]CE for biosignal engineering / Multiplierless designs for artificial neural networks / A VLSI system for intelligent decision making in real-time / Reconfigurable hardware systolic array for real-time compartmental modeling of large-scale artificial nervous systems / Implementing and mapping ANNs on reconfigurable mesh massively parallel architectures / |
| title_auth | Neural networks and systolic array design / |
| title_exact_search | Neural networks and systolic array design / |
| title_full | Neural networks and systolic array design / editors, David Zhang, Sankar K. Pal. |
| title_fullStr | Neural networks and systolic array design / editors, David Zhang, Sankar K. Pal. |
| title_full_unstemmed | Neural networks and systolic array design / editors, David Zhang, Sankar K. Pal. |
| title_short | Neural networks and systolic array design / |
| title_sort | neural networks and systolic array design |
| topic | Neural networks (Computer science) http://id.loc.gov/authorities/subjects/sh90001937 Systolic array circuits Design and construction. Neural Networks, Computer https://id.nlm.nih.gov/mesh/D016571 Réseaux neuronaux (Informatique) COMPUTERS Neural Networks. bisacsh Neural networks (Computer science) fast Systolic array circuits Design and construction fast |
| topic_facet | Neural networks (Computer science) Systolic array circuits Design and construction. Neural Networks, Computer Réseaux neuronaux (Informatique) COMPUTERS Neural Networks. Systolic array circuits Design and construction |
| url | https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=514253 |
| work_keys_str_mv | AT zhangdavid neuralnetworksandsystolicarraydesign AT palsankark neuralnetworksandsystolicarraydesign |