Metamodeling-driven IP reuse for SoC integration and microprocessor design /:
This cutting-edge resource offers you an in-depth understanding of metamodeling approaches for the reuse of intellectual properties (IPs) in the form of reusable design or verification components. The book covers the essential issues associated with fast and effective integration of reusable design...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Weitere Verfasser: | |
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Boston :
Artech House,
©2009.
|
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Zusammenfassung: | This cutting-edge resource offers you an in-depth understanding of metamodeling approaches for the reuse of intellectual properties (IPs) in the form of reusable design or verification components. The book covers the essential issues associated with fast and effective integration of reusable design components into a system-on-a-chip (SoC) to achieve faster design turn-around time. Moreover, it addresses key factors related to the use of reusable verification IPs for a "write once, use many times" verification strategy - another effective approach that can attain a faster product design cycle. |
| Beschreibung: | 1 online resource (xxi, 287 pages) : illustrations |
| Bibliographie: | Includes bibliographical references and index. |
| ISBN: | 9781596934252 1596934255 |
Internformat
MARC
| LEADER | 00000cam a2200000 a 4500 | ||
|---|---|---|---|
| 001 | ZDB-4-EBA-ocn547448110 | ||
| 003 | OCoLC | ||
| 005 | 20241004212047.0 | ||
| 006 | m o d | ||
| 007 | cr cnu---unuuu | ||
| 008 | 100308s2009 maua ob 001 0 eng d | ||
| 040 | |a N$T |b eng |e pn |c N$T |d YDXCP |d OCLCQ |d E7B |d FVL |d B24X7 |d OCLCQ |d DEBSZ |d NLGGC |d OCLCO |d OCLCQ |d OCLCO |d OCLCF |d OCLCO |d OCLCQ |d OCLCO |d LOA |d JBG |d AGLDB |d MOR |d PIFAG |d OCLCQ |d WY@ |d LUE |d STF |d WRM |d OCLCQ |d VTS |d COCUF |d NRAMU |d VT2 |d CUY |d COO |d OCLCQ |d M8D |d UKAHL |d OCLCQ |d K6U |d UKCRE |d OCLCO |d INARC |d OCLCQ |d PSYSI |d OCLCQ |d OCLCO |d OCLCL | ||
| 019 | |a 647841665 |a 698473377 |a 712987329 |a 722735654 |a 728058798 |a 961548845 |a 962561882 |a 966200426 |a 988530563 |a 992107599 |a 1037760222 |a 1038651987 |a 1045542758 |a 1055383121 |a 1081222699 |a 1153487382 | ||
| 020 | |a 9781596934252 |q (electronic bk.) | ||
| 020 | |a 1596934255 |q (electronic bk.) | ||
| 020 | |z 1596934247 | ||
| 020 | |z 9781596934245 | ||
| 035 | |a (OCoLC)547448110 |z (OCoLC)647841665 |z (OCoLC)698473377 |z (OCoLC)712987329 |z (OCoLC)722735654 |z (OCoLC)728058798 |z (OCoLC)961548845 |z (OCoLC)962561882 |z (OCoLC)966200426 |z (OCoLC)988530563 |z (OCoLC)992107599 |z (OCoLC)1037760222 |z (OCoLC)1038651987 |z (OCoLC)1045542758 |z (OCoLC)1055383121 |z (OCoLC)1081222699 |z (OCoLC)1153487382 | ||
| 050 | 4 | |a QA76.76.R47 |b M328 2009eb | |
| 072 | 7 | |a TEC |x 008050 |2 bisacsh | |
| 072 | 7 | |a TEC |x 008030 |2 bisacsh | |
| 072 | 7 | |a COM |x 036000 |2 bisacsh | |
| 082 | 7 | |a 621.39/5 |2 22 | |
| 049 | |a MAIN | ||
| 100 | 1 | |a Mathaikutty, Deepak A. |0 http://id.loc.gov/authorities/names/no2009139799 | |
| 245 | 1 | 0 | |a Metamodeling-driven IP reuse for SoC integration and microprocessor design / |c Deepak A. Mathaikutty, Sandeep K. Shukla. |
| 260 | |a Boston : |b Artech House, |c ©2009. | ||
| 300 | |a 1 online resource (xxi, 287 pages) : |b illustrations | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 504 | |a Includes bibliographical references and index. | ||
| 588 | 0 | |a Print version record. | |
| 520 | 3 | |a This cutting-edge resource offers you an in-depth understanding of metamodeling approaches for the reuse of intellectual properties (IPs) in the form of reusable design or verification components. The book covers the essential issues associated with fast and effective integration of reusable design components into a system-on-a-chip (SoC) to achieve faster design turn-around time. Moreover, it addresses key factors related to the use of reusable verification IPs for a "write once, use many times" verification strategy - another effective approach that can attain a faster product design cycle. |c Publisher abstract | |
| 650 | 0 | |a Computer software |x Reusability. |0 http://id.loc.gov/authorities/subjects/sh87004662 | |
| 650 | 0 | |a Computer software |x Verification. |0 http://id.loc.gov/authorities/subjects/sh85029537 | |
| 650 | 0 | |a Systems on a chip |x Design and construction. | |
| 650 | 0 | |a Microprocessors |x Design and construction. | |
| 650 | 0 | |a Intellectual property. |0 http://id.loc.gov/authorities/subjects/sh85067167 | |
| 650 | 0 | |a System design. |0 http://id.loc.gov/authorities/subjects/sh85131736 | |
| 650 | 2 | |a Intellectual Property |0 https://id.nlm.nih.gov/mesh/D018973 | |
| 650 | 6 | |a Logiciels |x Réutilisation. | |
| 650 | 6 | |a Logiciels |x Vérification. | |
| 650 | 6 | |a Propriété intellectuelle. | |
| 650 | 6 | |a Conception de systèmes. | |
| 650 | 7 | |a intellectual property. |2 aat | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Circuits |x VLSI & ULSI. |2 bisacsh | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Circuits |x Logic. |2 bisacsh | |
| 650 | 7 | |a COMPUTERS |x Logic Design. |2 bisacsh | |
| 650 | 7 | |a Computer software |x Reusability |2 fast | |
| 650 | 7 | |a Computer software |x Verification |2 fast | |
| 650 | 7 | |a Intellectual property |2 fast | |
| 650 | 7 | |a Microprocessors |x Design and construction |2 fast | |
| 650 | 7 | |a System design |2 fast | |
| 650 | 7 | |a Systems on a chip |x Design and construction |2 fast | |
| 700 | 1 | |a Shukla, Sandeep K. |0 http://id.loc.gov/authorities/names/n2004010911 | |
| 758 | |i has work: |a Metamodeling-driven IP reuse for SoC integration and microprocessor design (Text) |1 https://id.oclc.org/worldcat/entity/E39PCFPtcHTrvrTpQHtvj8ybFq |4 https://id.oclc.org/worldcat/ontology/hasWork | ||
| 776 | 0 | 8 | |i Print version: |a Mathaikutty, Deepak A. |t Metamodeling-driven IP reuse for SoC integration and microprocessor design. |d Boston : Artech House, ©2009 |z 9781596934245 |w (OCoLC)303058714 |
| 856 | 4 | 0 | |l FWS01 |p ZDB-4-EBA |q FWS_PDA_EBA |u https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=305426 |3 Volltext |
| 938 | |a EBSCOhost |b EBSC |n 305426 | ||
| 938 | |a Internet Archive |b INAR |n metamodelingdriv0000math | ||
| 938 | |a YBP Library Services |b YANK |n 3157876 | ||
| 938 | |a Books 24x7 |b B247 |n bke00032818 | ||
| 938 | |a Askews and Holts Library Services |b ASKH |n AH25159021 | ||
| 938 | |a IEEE |b IEEE |n 9100288 | ||
| 994 | |a 92 |b GEBAY | ||
| 912 | |a ZDB-4-EBA | ||
| 049 | |a DE-863 | ||
Datensatz im Suchindex
| DE-BY-FWS_katkey | ZDB-4-EBA-ocn547448110 |
|---|---|
| _version_ | 1816881704741109760 |
| adam_text | |
| any_adam_object | |
| author | Mathaikutty, Deepak A. |
| author2 | Shukla, Sandeep K. |
| author2_role | |
| author2_variant | s k s sk sks |
| author_GND | http://id.loc.gov/authorities/names/no2009139799 http://id.loc.gov/authorities/names/n2004010911 |
| author_facet | Mathaikutty, Deepak A. Shukla, Sandeep K. |
| author_role | |
| author_sort | Mathaikutty, Deepak A. |
| author_variant | d a m da dam |
| building | Verbundindex |
| bvnumber | localFWS |
| callnumber-first | Q - Science |
| callnumber-label | QA76 |
| callnumber-raw | QA76.76.R47 M328 2009eb |
| callnumber-search | QA76.76.R47 M328 2009eb |
| callnumber-sort | QA 276.76 R47 M328 42009EB |
| callnumber-subject | QA - Mathematics |
| collection | ZDB-4-EBA |
| ctrlnum | (OCoLC)547448110 |
| dewey-full | 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>04854cam a2200757 a 4500</leader><controlfield tag="001">ZDB-4-EBA-ocn547448110</controlfield><controlfield tag="003">OCoLC</controlfield><controlfield tag="005">20241004212047.0</controlfield><controlfield tag="006">m o d </controlfield><controlfield tag="007">cr cnu---unuuu</controlfield><controlfield tag="008">100308s2009 maua ob 001 0 eng d</controlfield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">N$T</subfield><subfield code="b">eng</subfield><subfield code="e">pn</subfield><subfield code="c">N$T</subfield><subfield code="d">YDXCP</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">E7B</subfield><subfield code="d">FVL</subfield><subfield code="d">B24X7</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">DEBSZ</subfield><subfield code="d">NLGGC</subfield><subfield code="d">OCLCO</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">OCLCO</subfield><subfield code="d">OCLCF</subfield><subfield code="d">OCLCO</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">OCLCO</subfield><subfield code="d">LOA</subfield><subfield code="d">JBG</subfield><subfield code="d">AGLDB</subfield><subfield code="d">MOR</subfield><subfield code="d">PIFAG</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">WY@</subfield><subfield code="d">LUE</subfield><subfield code="d">STF</subfield><subfield code="d">WRM</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">VTS</subfield><subfield code="d">COCUF</subfield><subfield code="d">NRAMU</subfield><subfield code="d">VT2</subfield><subfield code="d">CUY</subfield><subfield code="d">COO</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">M8D</subfield><subfield code="d">UKAHL</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">K6U</subfield><subfield code="d">UKCRE</subfield><subfield code="d">OCLCO</subfield><subfield code="d">INARC</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">PSYSI</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">OCLCO</subfield><subfield code="d">OCLCL</subfield></datafield><datafield tag="019" ind1=" " ind2=" "><subfield code="a">647841665</subfield><subfield code="a">698473377</subfield><subfield code="a">712987329</subfield><subfield code="a">722735654</subfield><subfield code="a">728058798</subfield><subfield code="a">961548845</subfield><subfield code="a">962561882</subfield><subfield code="a">966200426</subfield><subfield code="a">988530563</subfield><subfield code="a">992107599</subfield><subfield code="a">1037760222</subfield><subfield code="a">1038651987</subfield><subfield code="a">1045542758</subfield><subfield code="a">1055383121</subfield><subfield code="a">1081222699</subfield><subfield code="a">1153487382</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781596934252</subfield><subfield code="q">(electronic bk.)</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">1596934255</subfield><subfield code="q">(electronic bk.)</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="z">1596934247</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="z">9781596934245</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)547448110</subfield><subfield code="z">(OCoLC)647841665</subfield><subfield code="z">(OCoLC)698473377</subfield><subfield code="z">(OCoLC)712987329</subfield><subfield code="z">(OCoLC)722735654</subfield><subfield code="z">(OCoLC)728058798</subfield><subfield code="z">(OCoLC)961548845</subfield><subfield code="z">(OCoLC)962561882</subfield><subfield code="z">(OCoLC)966200426</subfield><subfield code="z">(OCoLC)988530563</subfield><subfield code="z">(OCoLC)992107599</subfield><subfield code="z">(OCoLC)1037760222</subfield><subfield code="z">(OCoLC)1038651987</subfield><subfield code="z">(OCoLC)1045542758</subfield><subfield code="z">(OCoLC)1055383121</subfield><subfield code="z">(OCoLC)1081222699</subfield><subfield code="z">(OCoLC)1153487382</subfield></datafield><datafield tag="050" ind1=" " ind2="4"><subfield code="a">QA76.76.R47</subfield><subfield code="b">M328 2009eb</subfield></datafield><datafield tag="072" ind1=" " ind2="7"><subfield code="a">TEC</subfield><subfield code="x">008050</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="072" ind1=" " ind2="7"><subfield code="a">TEC</subfield><subfield code="x">008030</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="072" ind1=" " ind2="7"><subfield code="a">COM</subfield><subfield code="x">036000</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="082" ind1="7" ind2=" "><subfield code="a">621.39/5</subfield><subfield code="2">22</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">MAIN</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Mathaikutty, Deepak A.</subfield><subfield code="0">http://id.loc.gov/authorities/names/no2009139799</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Metamodeling-driven IP reuse for SoC integration and microprocessor design /</subfield><subfield code="c">Deepak A. Mathaikutty, Sandeep K. Shukla.</subfield></datafield><datafield tag="260" ind1=" " ind2=" "><subfield code="a">Boston :</subfield><subfield code="b">Artech House,</subfield><subfield code="c">©2009.</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 online resource (xxi, 287 pages) :</subfield><subfield code="b">illustrations</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="a">text</subfield><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="a">computer</subfield><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="a">online resource</subfield><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="504" ind1=" " ind2=" "><subfield code="a">Includes bibliographical references and index.</subfield></datafield><datafield tag="588" ind1="0" ind2=" "><subfield code="a">Print version record.</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">This cutting-edge resource offers you an in-depth understanding of metamodeling approaches for the reuse of intellectual properties (IPs) in the form of reusable design or verification components. The book covers the essential issues associated with fast and effective integration of reusable design components into a system-on-a-chip (SoC) to achieve faster design turn-around time. Moreover, it addresses key factors related to the use of reusable verification IPs for a "write once, use many times" verification strategy - another effective approach that can attain a faster product design cycle.</subfield><subfield code="c">Publisher abstract</subfield></datafield><datafield tag="650" ind1=" " ind2="0"><subfield code="a">Computer software</subfield><subfield code="x">Reusability.</subfield><subfield code="0">http://id.loc.gov/authorities/subjects/sh87004662</subfield></datafield><datafield tag="650" ind1=" " ind2="0"><subfield code="a">Computer software</subfield><subfield code="x">Verification.</subfield><subfield code="0">http://id.loc.gov/authorities/subjects/sh85029537</subfield></datafield><datafield tag="650" ind1=" " ind2="0"><subfield code="a">Systems on a chip</subfield><subfield code="x">Design and construction.</subfield></datafield><datafield tag="650" ind1=" " ind2="0"><subfield code="a">Microprocessors</subfield><subfield code="x">Design and construction.</subfield></datafield><datafield tag="650" ind1=" " ind2="0"><subfield code="a">Intellectual property.</subfield><subfield code="0">http://id.loc.gov/authorities/subjects/sh85067167</subfield></datafield><datafield tag="650" ind1=" " ind2="0"><subfield code="a">System design.</subfield><subfield code="0">http://id.loc.gov/authorities/subjects/sh85131736</subfield></datafield><datafield tag="650" ind1=" " ind2="2"><subfield code="a">Intellectual Property</subfield><subfield code="0">https://id.nlm.nih.gov/mesh/D018973</subfield></datafield><datafield tag="650" ind1=" " ind2="6"><subfield code="a">Logiciels</subfield><subfield code="x">Réutilisation.</subfield></datafield><datafield tag="650" ind1=" " ind2="6"><subfield code="a">Logiciels</subfield><subfield code="x">Vérification.</subfield></datafield><datafield tag="650" ind1=" " ind2="6"><subfield code="a">Propriété intellectuelle.</subfield></datafield><datafield tag="650" ind1=" " ind2="6"><subfield code="a">Conception de systèmes.</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">intellectual property.</subfield><subfield code="2">aat</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">TECHNOLOGY & ENGINEERING</subfield><subfield code="x">Electronics</subfield><subfield code="x">Circuits</subfield><subfield code="x">VLSI & ULSI.</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">TECHNOLOGY & ENGINEERING</subfield><subfield code="x">Electronics</subfield><subfield code="x">Circuits</subfield><subfield code="x">Logic.</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">COMPUTERS</subfield><subfield code="x">Logic Design.</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Computer software</subfield><subfield code="x">Reusability</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Computer software</subfield><subfield code="x">Verification</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Intellectual property</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Microprocessors</subfield><subfield code="x">Design and construction</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">System design</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Systems on a chip</subfield><subfield code="x">Design and construction</subfield><subfield code="2">fast</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Shukla, Sandeep K.</subfield><subfield code="0">http://id.loc.gov/authorities/names/n2004010911</subfield></datafield><datafield tag="758" ind1=" " ind2=" "><subfield code="i">has work:</subfield><subfield code="a">Metamodeling-driven IP reuse for SoC integration and microprocessor design (Text)</subfield><subfield code="1">https://id.oclc.org/worldcat/entity/E39PCFPtcHTrvrTpQHtvj8ybFq</subfield><subfield code="4">https://id.oclc.org/worldcat/ontology/hasWork</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Print version:</subfield><subfield code="a">Mathaikutty, Deepak A.</subfield><subfield code="t">Metamodeling-driven IP reuse for SoC integration and microprocessor design.</subfield><subfield code="d">Boston : Artech House, ©2009</subfield><subfield code="z">9781596934245</subfield><subfield code="w">(OCoLC)303058714</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="l">FWS01</subfield><subfield code="p">ZDB-4-EBA</subfield><subfield code="q">FWS_PDA_EBA</subfield><subfield code="u">https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=305426</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">EBSCOhost</subfield><subfield code="b">EBSC</subfield><subfield code="n">305426</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">Internet Archive</subfield><subfield code="b">INAR</subfield><subfield code="n">metamodelingdriv0000math</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">YBP Library Services</subfield><subfield code="b">YANK</subfield><subfield code="n">3157876</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">Books 24x7</subfield><subfield code="b">B247</subfield><subfield code="n">bke00032818</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">Askews and Holts Library Services</subfield><subfield code="b">ASKH</subfield><subfield code="n">AH25159021</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">IEEE</subfield><subfield code="b">IEEE</subfield><subfield code="n">9100288</subfield></datafield><datafield tag="994" ind1=" " ind2=" "><subfield code="a">92</subfield><subfield code="b">GEBAY</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-4-EBA</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-863</subfield></datafield></record></collection> |
| id | ZDB-4-EBA-ocn547448110 |
| illustrated | Illustrated |
| indexdate | 2024-11-27T13:16:57Z |
| institution | BVB |
| isbn | 9781596934252 1596934255 |
| language | English |
| oclc_num | 547448110 |
| open_access_boolean | |
| owner | MAIN DE-863 DE-BY-FWS |
| owner_facet | MAIN DE-863 DE-BY-FWS |
| physical | 1 online resource (xxi, 287 pages) : illustrations |
| psigel | ZDB-4-EBA |
| publishDate | 2009 |
| publishDateSearch | 2009 |
| publishDateSort | 2009 |
| publisher | Artech House, |
| record_format | marc |
| spelling | Mathaikutty, Deepak A. http://id.loc.gov/authorities/names/no2009139799 Metamodeling-driven IP reuse for SoC integration and microprocessor design / Deepak A. Mathaikutty, Sandeep K. Shukla. Boston : Artech House, ©2009. 1 online resource (xxi, 287 pages) : illustrations text txt rdacontent computer c rdamedia online resource cr rdacarrier Includes bibliographical references and index. Print version record. This cutting-edge resource offers you an in-depth understanding of metamodeling approaches for the reuse of intellectual properties (IPs) in the form of reusable design or verification components. The book covers the essential issues associated with fast and effective integration of reusable design components into a system-on-a-chip (SoC) to achieve faster design turn-around time. Moreover, it addresses key factors related to the use of reusable verification IPs for a "write once, use many times" verification strategy - another effective approach that can attain a faster product design cycle. Publisher abstract Computer software Reusability. http://id.loc.gov/authorities/subjects/sh87004662 Computer software Verification. http://id.loc.gov/authorities/subjects/sh85029537 Systems on a chip Design and construction. Microprocessors Design and construction. Intellectual property. http://id.loc.gov/authorities/subjects/sh85067167 System design. http://id.loc.gov/authorities/subjects/sh85131736 Intellectual Property https://id.nlm.nih.gov/mesh/D018973 Logiciels Réutilisation. Logiciels Vérification. Propriété intellectuelle. Conception de systèmes. intellectual property. aat TECHNOLOGY & ENGINEERING Electronics Circuits VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING Electronics Circuits Logic. bisacsh COMPUTERS Logic Design. bisacsh Computer software Reusability fast Computer software Verification fast Intellectual property fast Microprocessors Design and construction fast System design fast Systems on a chip Design and construction fast Shukla, Sandeep K. http://id.loc.gov/authorities/names/n2004010911 has work: Metamodeling-driven IP reuse for SoC integration and microprocessor design (Text) https://id.oclc.org/worldcat/entity/E39PCFPtcHTrvrTpQHtvj8ybFq https://id.oclc.org/worldcat/ontology/hasWork Print version: Mathaikutty, Deepak A. Metamodeling-driven IP reuse for SoC integration and microprocessor design. Boston : Artech House, ©2009 9781596934245 (OCoLC)303058714 FWS01 ZDB-4-EBA FWS_PDA_EBA https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=305426 Volltext |
| spellingShingle | Mathaikutty, Deepak A. Metamodeling-driven IP reuse for SoC integration and microprocessor design / Computer software Reusability. http://id.loc.gov/authorities/subjects/sh87004662 Computer software Verification. http://id.loc.gov/authorities/subjects/sh85029537 Systems on a chip Design and construction. Microprocessors Design and construction. Intellectual property. http://id.loc.gov/authorities/subjects/sh85067167 System design. http://id.loc.gov/authorities/subjects/sh85131736 Intellectual Property https://id.nlm.nih.gov/mesh/D018973 Logiciels Réutilisation. Logiciels Vérification. Propriété intellectuelle. Conception de systèmes. intellectual property. aat TECHNOLOGY & ENGINEERING Electronics Circuits VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING Electronics Circuits Logic. bisacsh COMPUTERS Logic Design. bisacsh Computer software Reusability fast Computer software Verification fast Intellectual property fast Microprocessors Design and construction fast System design fast Systems on a chip Design and construction fast |
| subject_GND | http://id.loc.gov/authorities/subjects/sh87004662 http://id.loc.gov/authorities/subjects/sh85029537 http://id.loc.gov/authorities/subjects/sh85067167 http://id.loc.gov/authorities/subjects/sh85131736 https://id.nlm.nih.gov/mesh/D018973 |
| title | Metamodeling-driven IP reuse for SoC integration and microprocessor design / |
| title_auth | Metamodeling-driven IP reuse for SoC integration and microprocessor design / |
| title_exact_search | Metamodeling-driven IP reuse for SoC integration and microprocessor design / |
| title_full | Metamodeling-driven IP reuse for SoC integration and microprocessor design / Deepak A. Mathaikutty, Sandeep K. Shukla. |
| title_fullStr | Metamodeling-driven IP reuse for SoC integration and microprocessor design / Deepak A. Mathaikutty, Sandeep K. Shukla. |
| title_full_unstemmed | Metamodeling-driven IP reuse for SoC integration and microprocessor design / Deepak A. Mathaikutty, Sandeep K. Shukla. |
| title_short | Metamodeling-driven IP reuse for SoC integration and microprocessor design / |
| title_sort | metamodeling driven ip reuse for soc integration and microprocessor design |
| topic | Computer software Reusability. http://id.loc.gov/authorities/subjects/sh87004662 Computer software Verification. http://id.loc.gov/authorities/subjects/sh85029537 Systems on a chip Design and construction. Microprocessors Design and construction. Intellectual property. http://id.loc.gov/authorities/subjects/sh85067167 System design. http://id.loc.gov/authorities/subjects/sh85131736 Intellectual Property https://id.nlm.nih.gov/mesh/D018973 Logiciels Réutilisation. Logiciels Vérification. Propriété intellectuelle. Conception de systèmes. intellectual property. aat TECHNOLOGY & ENGINEERING Electronics Circuits VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING Electronics Circuits Logic. bisacsh COMPUTERS Logic Design. bisacsh Computer software Reusability fast Computer software Verification fast Intellectual property fast Microprocessors Design and construction fast System design fast Systems on a chip Design and construction fast |
| topic_facet | Computer software Reusability. Computer software Verification. Systems on a chip Design and construction. Microprocessors Design and construction. Intellectual property. System design. Intellectual Property Logiciels Réutilisation. Logiciels Vérification. Propriété intellectuelle. Conception de systèmes. intellectual property. TECHNOLOGY & ENGINEERING Electronics Circuits VLSI & ULSI. TECHNOLOGY & ENGINEERING Electronics Circuits Logic. COMPUTERS Logic Design. Computer software Reusability Computer software Verification Intellectual property Microprocessors Design and construction System design Systems on a chip Design and construction |
| url | https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=305426 |
| work_keys_str_mv | AT mathaikuttydeepaka metamodelingdrivenipreuseforsocintegrationandmicroprocessordesign AT shuklasandeepk metamodelingdrivenipreuseforsocintegrationandmicroprocessordesign |