Design recipes for FPGAs /:
A rich treasure chest of design techniques and templates for solving practical, every-day problems using FPGAs.
Saved in:
| Main Author: | |
|---|---|
| Format: | Electronic eBook |
| Language: | English |
| Published: |
Amsterdam ; Boston ; London :
Newnes,
2007.
|
| Subjects: | |
| Online Access: | DE-862 DE-863 DE-862 DE-863 |
| Summary: | A rich treasure chest of design techniques and templates for solving practical, every-day problems using FPGAs. |
| Physical Description: | 1 online resource (xxii, 289 pages) : illustrations |
| Bibliography: | Includes bibliographical references (pages 284-285) and index. |
| ISBN: | 9780080548425 0080548423 |
Staff View
MARC
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| 245 | 1 | 0 | |a Design recipes for FPGAs / |c Peter R. Wilson. |
| 260 | |a Amsterdam ; |a Boston ; |a London : |b Newnes, |c 2007. | ||
| 300 | |a 1 online resource (xxii, 289 pages) : |b illustrations | ||
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| 504 | |a Includes bibliographical references (pages 284-285) and index. | ||
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| 505 | 0 | |a Front cover; Design Recipes for FPGAs; Copyright page; Contents; Acknowledgements; Preface; List of Figures; Part 1 Overview; Part 2 Applications; Part 3 Designer's Toolbox; Part 4 Optimizing Designs; Part 5 Fundamental Techniques; Index. | |
| 520 | |a A rich treasure chest of design techniques and templates for solving practical, every-day problems using FPGAs. | ||
| 650 | 0 | |a Field programmable gate arrays |x Design and construction. | |
| 650 | 0 | |a Gate array circuits. |0 http://id.loc.gov/authorities/subjects/sh86007843 | |
| 650 | 6 | |a Circuits prédiffusés. | |
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Record in the Search Index
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| _version_ | 1829094613761130496 |
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| author | Wilson, Peter R. (Peter Robert), 1939- |
| author_GND | http://id.loc.gov/authorities/names/nb2001079508 |
| author_facet | Wilson, Peter R. (Peter Robert), 1939- |
| author_role | |
| author_sort | Wilson, Peter R. 1939- |
| author_variant | p r w pr prw |
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| bvnumber | localFWS |
| callnumber-first | T - Technology |
| callnumber-label | TK7895 |
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| callnumber-search | TK7895.G36 W55 2007eb |
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| callnumber-subject | TK - Electrical and Nuclear Engineering |
| collection | ZDB-4-EBA |
| contents | Front cover; Design Recipes for FPGAs; Copyright page; Contents; Acknowledgements; Preface; List of Figures; Part 1 Overview; Part 2 Applications; Part 3 Designer's Toolbox; Part 4 Optimizing Designs; Part 5 Fundamental Techniques; Index. |
| ctrlnum | (OCoLC)173502373 |
| dewey-full | 621.395 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.395 |
| dewey-search | 621.395 |
| dewey-sort | 3621.395 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
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| id | ZDB-4-EBA-ocn173502373 |
| illustrated | Illustrated |
| indexdate | 2025-04-11T08:35:55Z |
| institution | BVB |
| isbn | 9780080548425 0080548423 |
| language | English |
| oclc_num | 173502373 |
| open_access_boolean | |
| owner | MAIN DE-862 DE-BY-FWS DE-863 DE-BY-FWS |
| owner_facet | MAIN DE-862 DE-BY-FWS DE-863 DE-BY-FWS |
| physical | 1 online resource (xxii, 289 pages) : illustrations |
| psigel | ZDB-4-EBA FWS_PDA_EBA ZDB-4-EBA |
| publishDate | 2007 |
| publishDateSearch | 2007 |
| publishDateSort | 2007 |
| publisher | Newnes, |
| record_format | marc |
| spelling | Wilson, Peter R. (Peter Robert), 1939- https://id.oclc.org/worldcat/entity/E39PCjFMKDdCWt8T3vcQdCfrMP http://id.loc.gov/authorities/names/nb2001079508 Design recipes for FPGAs / Peter R. Wilson. Amsterdam ; Boston ; London : Newnes, 2007. 1 online resource (xxii, 289 pages) : illustrations text txt rdacontent computer c rdamedia online resource cr rdacarrier Includes bibliographical references (pages 284-285) and index. Print version record. Front cover; Design Recipes for FPGAs; Copyright page; Contents; Acknowledgements; Preface; List of Figures; Part 1 Overview; Part 2 Applications; Part 3 Designer's Toolbox; Part 4 Optimizing Designs; Part 5 Fundamental Techniques; Index. A rich treasure chest of design techniques and templates for solving practical, every-day problems using FPGAs. Field programmable gate arrays Design and construction. Gate array circuits. http://id.loc.gov/authorities/subjects/sh86007843 Circuits prédiffusés. TECHNOLOGY & ENGINEERING Electronics Circuits VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING Electronics Circuits Logic. bisacsh COMPUTERS Logic Design. bisacsh Field programmable gate arrays Design and construction fast dissertations. aat Academic theses fast Academic theses. lcgft http://id.loc.gov/authorities/genreForms/gf2014026039 Thèses et écrits académiques. rvmgf Print version: Wilson, Peter R. (Peter Robert), 1939- Design recipes for FPGAs. Amsterdam ; Boston ; London : Newnes, 2007 9780750668453 0750668458 (OCoLC)85829383 |
| spellingShingle | Wilson, Peter R. (Peter Robert), 1939- Design recipes for FPGAs / Front cover; Design Recipes for FPGAs; Copyright page; Contents; Acknowledgements; Preface; List of Figures; Part 1 Overview; Part 2 Applications; Part 3 Designer's Toolbox; Part 4 Optimizing Designs; Part 5 Fundamental Techniques; Index. Field programmable gate arrays Design and construction. Gate array circuits. http://id.loc.gov/authorities/subjects/sh86007843 Circuits prédiffusés. TECHNOLOGY & ENGINEERING Electronics Circuits VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING Electronics Circuits Logic. bisacsh COMPUTERS Logic Design. bisacsh Field programmable gate arrays Design and construction fast |
| subject_GND | http://id.loc.gov/authorities/subjects/sh86007843 http://id.loc.gov/authorities/genreForms/gf2014026039 |
| title | Design recipes for FPGAs / |
| title_auth | Design recipes for FPGAs / |
| title_exact_search | Design recipes for FPGAs / |
| title_full | Design recipes for FPGAs / Peter R. Wilson. |
| title_fullStr | Design recipes for FPGAs / Peter R. Wilson. |
| title_full_unstemmed | Design recipes for FPGAs / Peter R. Wilson. |
| title_short | Design recipes for FPGAs / |
| title_sort | design recipes for fpgas |
| topic | Field programmable gate arrays Design and construction. Gate array circuits. http://id.loc.gov/authorities/subjects/sh86007843 Circuits prédiffusés. TECHNOLOGY & ENGINEERING Electronics Circuits VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING Electronics Circuits Logic. bisacsh COMPUTERS Logic Design. bisacsh Field programmable gate arrays Design and construction fast |
| topic_facet | Field programmable gate arrays Design and construction. Gate array circuits. Circuits prédiffusés. TECHNOLOGY & ENGINEERING Electronics Circuits VLSI & ULSI. TECHNOLOGY & ENGINEERING Electronics Circuits Logic. COMPUTERS Logic Design. Field programmable gate arrays Design and construction dissertations. Academic theses Academic theses. Thèses et écrits académiques. |
| work_keys_str_mv | AT wilsonpeterr designrecipesforfpgas |