ESL design and verification :: a prescription for electronic system-level methodology /
Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is e...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Weitere Verfasser: | , |
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Amsterdam ; Boston :
Morgan Kaufmann,
©2007.
|
| Schriftenreihe: | Morgan Kaufmann series in systems on silicon.
|
| Schlagworte: | |
| Online-Zugang: | Volltext Volltext |
| Zusammenfassung: | Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Visit the authors' companion site! http://www.electronicsystemlevel.com/ * Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts |
| Beschreibung: | 1 online resource (xxv, 462 pages) : illustrations |
| Bibliographie: | Includes bibliographical references and index. |
| ISBN: | 9780080488837 0080488838 1281053538 9781281053534 9786611053536 6611053530 |
Internformat
MARC
| LEADER | 00000cam a2200000 a 4500 | ||
|---|---|---|---|
| 001 | ZDB-4-EBA-ocn146316668 | ||
| 003 | OCoLC | ||
| 005 | 20241004212047.0 | ||
| 006 | m o d | ||
| 007 | cr cnu---unuuu | ||
| 008 | 070628s2007 ne a ob 001 0 eng d | ||
| 010 | |a 2006103541 | ||
| 040 | |a N$T |b eng |e pn |c N$T |d YDXCP |d OCLCQ |d IDEBK |d ZCU |d E7B |d OCLCQ |d UMI |d CEF |d DKDLA |d OCLCQ |d DEBSZ |d OCLCO |d OCLCQ |d OCLCF |d OCLCQ |d OPELS |d OCLCQ |d COO |d OCLCQ |d AZK |d LOA |d JBG |d COCUF |d AGLDB |d MOR |d PIFAG |d TEFOD |d OCLCQ |d U3W |d STF |d WRM |d D6H |d OCLCQ |d VTS |d INT |d VT2 |d OCLCQ |d WYU |d OCLCQ |d REC |d LEAUB |d M8D |d OCLCQ |d K6U |d VLY |d OCLCQ |d OCLCO |d SFB |d OCLCQ |d OCLCO |d OCLCL |d EZC |d INARC | ||
| 015 | |a GBA707930 |2 bnb | ||
| 016 | 7 | |z 013655410 |2 Uk | |
| 019 | |a 162574103 |a 435501528 |a 488132561 |a 507083420 |a 648304037 |a 856957764 |a 961647469 |a 962678781 |a 966264867 |a 988503591 |a 992060868 |a 1034933442 |a 1037753652 |a 1038687420 |a 1044296293 |a 1055317510 |a 1056382235 |a 1073919005 |a 1081215111 |a 1100829828 |a 1103540866 |a 1132431157 |a 1162455625 |a 1228558255 |a 1241883826 |a 1290086368 |a 1300462022 | ||
| 020 | |a 9780080488837 |q (electronic bk.) | ||
| 020 | |a 0080488838 |q (electronic bk.) | ||
| 020 | |a 1281053538 | ||
| 020 | |a 9781281053534 | ||
| 020 | |a 9786611053536 | ||
| 020 | |a 6611053530 | ||
| 020 | |z 9780123735515 | ||
| 020 | |z 0123735513 | ||
| 035 | |a (OCoLC)146316668 |z (OCoLC)162574103 |z (OCoLC)435501528 |z (OCoLC)488132561 |z (OCoLC)507083420 |z (OCoLC)648304037 |z (OCoLC)856957764 |z (OCoLC)961647469 |z (OCoLC)962678781 |z (OCoLC)966264867 |z (OCoLC)988503591 |z (OCoLC)992060868 |z (OCoLC)1034933442 |z (OCoLC)1037753652 |z (OCoLC)1038687420 |z (OCoLC)1044296293 |z (OCoLC)1055317510 |z (OCoLC)1056382235 |z (OCoLC)1073919005 |z (OCoLC)1081215111 |z (OCoLC)1100829828 |z (OCoLC)1103540866 |z (OCoLC)1132431157 |z (OCoLC)1162455625 |z (OCoLC)1228558255 |z (OCoLC)1241883826 |z (OCoLC)1290086368 |z (OCoLC)1300462022 | ||
| 037 | |a CL0500000047 |b Safari Books Online | ||
| 037 | |a D8B7E333-E6CC-4488-84F9-061A4DA6E01A |b OverDrive, Inc. |n http://www.overdrive.com | ||
| 050 | 4 | |a TK7895.E42 |b B326 2007eb | |
| 072 | 7 | |a TEC |x 008020 |2 bisacsh | |
| 072 | 7 | |a TEC |x 008010 |2 bisacsh | |
| 082 | 7 | |a 621.3815 |2 22 | |
| 049 | |a MAIN | ||
| 100 | 1 | |a Bailey, Brian, |d 1959- |1 https://id.oclc.org/worldcat/entity/E39PCjG8qxpffq8RvJ36jbbgTd |0 http://id.loc.gov/authorities/names/no2005090028 | |
| 245 | 1 | 0 | |a ESL design and verification : |b a prescription for electronic system-level methodology / |c Brian Bailey, Grant Martin, Andrew Piziali. |
| 246 | 3 | |a Electronic system-level design | |
| 260 | |a Amsterdam ; |a Boston : |b Morgan Kaufmann, |c ©2007. | ||
| 300 | |a 1 online resource (xxv, 462 pages) : |b illustrations | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 490 | 1 | |a The Morgan Kaufmann series in systems on silicon | |
| 504 | |a Includes bibliographical references and index. | ||
| 505 | 0 | |a CHAPTER 1 WHAT IS ESL?. CHAPTER 2 TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL CHAPTER 3 EVOLUTION OF ESL DEVELOPMENT CHAPTER 4 WHAT ARE THE ENABLERS OF ESL?. CHAPTER 5 ESL FLOW. CHAPTER 6 SPECIFICATIONS AND MODELING. CHAPTER 7 PRE-PARTITIONING ANALYSIS. CHAPTER 8 PARTITIONING. CHAPTER 9 POST-PARTITIONING ANALYSIS AND DEBUG CHAPTER 10 POST-PARTITIONING VERIFICATION. CHAPTER 11 HARDWARE IMPLEMENTATION. CHAPTER 12 SOFTWARE IMPLEMENTATION. CHAPTER 13 USE OF ESL FOR IMPLEMENTATION VERIFICATION CHAPTER 14 RESEARCH, EMERGING AND FUTURE PROSPECTS. APPENDIX: LIST OF ACRONYMS. | |
| 520 | 8 | |a Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Visit the authors' companion site! http://www.electronicsystemlevel.com/ * Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts | |
| 588 | 0 | |a Print version record. | |
| 546 | |a English. | ||
| 650 | 0 | |a Systems on a chip |x Design and construction. | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Circuits |x Integrated. |2 bisacsh | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Circuits |x General. |2 bisacsh | |
| 650 | 7 | |a Systems on a chip |x Design and construction. |2 blmlsh | |
| 650 | 7 | |a Systems on a chip |x Design and construction |2 fast | |
| 655 | 7 | |a dissertations. |2 aat | |
| 655 | 7 | |a Academic theses |2 fast | |
| 655 | 7 | |a Academic theses. |2 lcgft |0 http://id.loc.gov/authorities/genreForms/gf2014026039 | |
| 655 | 7 | |a Thèses et écrits académiques. |2 rvmgf | |
| 700 | 1 | |a Martin, Grant |q (Grant Edmund) |1 https://id.oclc.org/worldcat/entity/E39PCjMw46xwx79CwgPpfJvT73 |0 http://id.loc.gov/authorities/names/n2003002656 | |
| 700 | 1 | |a Piziali, Andrew. |0 http://id.loc.gov/authorities/names/n2004011209 | |
| 758 | |i has work: |a ESL design and verification (Text) |1 https://id.oclc.org/worldcat/entity/E39PCH8XhHjW3bQ3jYWXkBVqDC |4 https://id.oclc.org/worldcat/ontology/hasWork | ||
| 776 | 0 | 8 | |i Print version: |a Bailey, Brian, 1959- |t ESL design and verification. |d Amsterdam ; Boston : Morgan Kaufmann, ©2007 |z 9780123735515 |z 0123735513 |w (DLC) 2006103541 |w (OCoLC)77573915 |
| 830 | 0 | |a Morgan Kaufmann series in systems on silicon. |0 http://id.loc.gov/authorities/names/n2001146727 | |
| 856 | 4 | 0 | |l FWS01 |p ZDB-4-EBA |q FWS_PDA_EBA |u https://www.sciencedirect.com/science/book/9780123735515 |3 Volltext |
| 856 | 4 | 0 | |l FWS01 |p ZDB-4-EBA |q FWS_PDA_EBA |u https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=196165 |3 Volltext |
| 938 | |a ebrary |b EBRY |n ebr10186468 | ||
| 938 | |a EBSCOhost |b EBSC |n 196165 | ||
| 938 | |a YBP Library Services |b YANK |n 2574567 | ||
| 938 | |a Internet Archive |b INAR |n esldesignverific0000bail | ||
| 994 | |a 92 |b GEBAY | ||
| 912 | |a ZDB-4-EBA | ||
| 049 | |a DE-863 | ||
Datensatz im Suchindex
| DE-BY-FWS_katkey | ZDB-4-EBA-ocn146316668 |
|---|---|
| _version_ | 1816881649322819584 |
| adam_text | |
| any_adam_object | |
| author | Bailey, Brian, 1959- |
| author2 | Martin, Grant (Grant Edmund) Piziali, Andrew |
| author2_role | |
| author2_variant | g m gm a p ap |
| author_GND | http://id.loc.gov/authorities/names/no2005090028 http://id.loc.gov/authorities/names/n2003002656 http://id.loc.gov/authorities/names/n2004011209 |
| author_facet | Bailey, Brian, 1959- Martin, Grant (Grant Edmund) Piziali, Andrew |
| author_role | |
| author_sort | Bailey, Brian, 1959- |
| author_variant | b b bb |
| building | Verbundindex |
| bvnumber | localFWS |
| callnumber-first | T - Technology |
| callnumber-label | TK7895 |
| callnumber-raw | TK7895.E42 B326 2007eb |
| callnumber-search | TK7895.E42 B326 2007eb |
| callnumber-sort | TK 47895 E42 B326 42007EB |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| collection | ZDB-4-EBA |
| contents | CHAPTER 1 WHAT IS ESL?. CHAPTER 2 TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL CHAPTER 3 EVOLUTION OF ESL DEVELOPMENT CHAPTER 4 WHAT ARE THE ENABLERS OF ESL?. CHAPTER 5 ESL FLOW. CHAPTER 6 SPECIFICATIONS AND MODELING. CHAPTER 7 PRE-PARTITIONING ANALYSIS. CHAPTER 8 PARTITIONING. CHAPTER 9 POST-PARTITIONING ANALYSIS AND DEBUG CHAPTER 10 POST-PARTITIONING VERIFICATION. CHAPTER 11 HARDWARE IMPLEMENTATION. CHAPTER 12 SOFTWARE IMPLEMENTATION. CHAPTER 13 USE OF ESL FOR IMPLEMENTATION VERIFICATION CHAPTER 14 RESEARCH, EMERGING AND FUTURE PROSPECTS. APPENDIX: LIST OF ACRONYMS. |
| ctrlnum | (OCoLC)146316668 |
| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>06708cam a2200769 a 4500</leader><controlfield tag="001">ZDB-4-EBA-ocn146316668</controlfield><controlfield tag="003">OCoLC</controlfield><controlfield tag="005">20241004212047.0</controlfield><controlfield tag="006">m o d </controlfield><controlfield tag="007">cr cnu---unuuu</controlfield><controlfield tag="008">070628s2007 ne a ob 001 0 eng d</controlfield><datafield tag="010" ind1=" " ind2=" "><subfield code="a"> 2006103541</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">N$T</subfield><subfield code="b">eng</subfield><subfield code="e">pn</subfield><subfield code="c">N$T</subfield><subfield code="d">YDXCP</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">IDEBK</subfield><subfield code="d">ZCU</subfield><subfield code="d">E7B</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">UMI</subfield><subfield code="d">CEF</subfield><subfield code="d">DKDLA</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">DEBSZ</subfield><subfield code="d">OCLCO</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">OCLCF</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">OPELS</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">COO</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">AZK</subfield><subfield code="d">LOA</subfield><subfield code="d">JBG</subfield><subfield code="d">COCUF</subfield><subfield code="d">AGLDB</subfield><subfield code="d">MOR</subfield><subfield code="d">PIFAG</subfield><subfield code="d">TEFOD</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">U3W</subfield><subfield code="d">STF</subfield><subfield code="d">WRM</subfield><subfield code="d">D6H</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">VTS</subfield><subfield code="d">INT</subfield><subfield code="d">VT2</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">WYU</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">REC</subfield><subfield code="d">LEAUB</subfield><subfield code="d">M8D</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">K6U</subfield><subfield code="d">VLY</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">OCLCO</subfield><subfield code="d">SFB</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">OCLCO</subfield><subfield code="d">OCLCL</subfield><subfield code="d">EZC</subfield><subfield code="d">INARC</subfield></datafield><datafield tag="015" ind1=" " ind2=" "><subfield code="a">GBA707930</subfield><subfield code="2">bnb</subfield></datafield><datafield tag="016" ind1="7" ind2=" "><subfield code="z">013655410</subfield><subfield code="2">Uk</subfield></datafield><datafield tag="019" ind1=" " ind2=" "><subfield code="a">162574103</subfield><subfield code="a">435501528</subfield><subfield code="a">488132561</subfield><subfield code="a">507083420</subfield><subfield code="a">648304037</subfield><subfield code="a">856957764</subfield><subfield code="a">961647469</subfield><subfield code="a">962678781</subfield><subfield code="a">966264867</subfield><subfield code="a">988503591</subfield><subfield code="a">992060868</subfield><subfield code="a">1034933442</subfield><subfield code="a">1037753652</subfield><subfield code="a">1038687420</subfield><subfield code="a">1044296293</subfield><subfield code="a">1055317510</subfield><subfield code="a">1056382235</subfield><subfield code="a">1073919005</subfield><subfield code="a">1081215111</subfield><subfield code="a">1100829828</subfield><subfield code="a">1103540866</subfield><subfield code="a">1132431157</subfield><subfield code="a">1162455625</subfield><subfield code="a">1228558255</subfield><subfield code="a">1241883826</subfield><subfield code="a">1290086368</subfield><subfield code="a">1300462022</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9780080488837</subfield><subfield code="q">(electronic bk.)</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0080488838</subfield><subfield code="q">(electronic bk.)</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">1281053538</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781281053534</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9786611053536</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">6611053530</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="z">9780123735515</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="z">0123735513</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)146316668</subfield><subfield code="z">(OCoLC)162574103</subfield><subfield code="z">(OCoLC)435501528</subfield><subfield code="z">(OCoLC)488132561</subfield><subfield code="z">(OCoLC)507083420</subfield><subfield code="z">(OCoLC)648304037</subfield><subfield code="z">(OCoLC)856957764</subfield><subfield code="z">(OCoLC)961647469</subfield><subfield code="z">(OCoLC)962678781</subfield><subfield code="z">(OCoLC)966264867</subfield><subfield code="z">(OCoLC)988503591</subfield><subfield code="z">(OCoLC)992060868</subfield><subfield code="z">(OCoLC)1034933442</subfield><subfield code="z">(OCoLC)1037753652</subfield><subfield code="z">(OCoLC)1038687420</subfield><subfield code="z">(OCoLC)1044296293</subfield><subfield code="z">(OCoLC)1055317510</subfield><subfield code="z">(OCoLC)1056382235</subfield><subfield code="z">(OCoLC)1073919005</subfield><subfield code="z">(OCoLC)1081215111</subfield><subfield code="z">(OCoLC)1100829828</subfield><subfield code="z">(OCoLC)1103540866</subfield><subfield code="z">(OCoLC)1132431157</subfield><subfield code="z">(OCoLC)1162455625</subfield><subfield code="z">(OCoLC)1228558255</subfield><subfield code="z">(OCoLC)1241883826</subfield><subfield code="z">(OCoLC)1290086368</subfield><subfield code="z">(OCoLC)1300462022</subfield></datafield><datafield tag="037" ind1=" " ind2=" "><subfield code="a">CL0500000047</subfield><subfield code="b">Safari Books Online</subfield></datafield><datafield tag="037" ind1=" " ind2=" "><subfield code="a">D8B7E333-E6CC-4488-84F9-061A4DA6E01A</subfield><subfield code="b">OverDrive, Inc.</subfield><subfield code="n">http://www.overdrive.com</subfield></datafield><datafield tag="050" ind1=" " ind2="4"><subfield code="a">TK7895.E42</subfield><subfield code="b">B326 2007eb</subfield></datafield><datafield tag="072" ind1=" " ind2="7"><subfield code="a">TEC</subfield><subfield code="x">008020</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="072" ind1=" " ind2="7"><subfield code="a">TEC</subfield><subfield code="x">008010</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="082" ind1="7" ind2=" "><subfield code="a">621.3815</subfield><subfield code="2">22</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">MAIN</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Bailey, Brian,</subfield><subfield code="d">1959-</subfield><subfield code="1">https://id.oclc.org/worldcat/entity/E39PCjG8qxpffq8RvJ36jbbgTd</subfield><subfield code="0">http://id.loc.gov/authorities/names/no2005090028</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">ESL design and verification :</subfield><subfield code="b">a prescription for electronic system-level methodology /</subfield><subfield code="c">Brian Bailey, Grant Martin, Andrew Piziali.</subfield></datafield><datafield tag="246" ind1="3" ind2=" "><subfield code="a">Electronic system-level design</subfield></datafield><datafield tag="260" ind1=" " ind2=" "><subfield code="a">Amsterdam ;</subfield><subfield code="a">Boston :</subfield><subfield code="b">Morgan Kaufmann,</subfield><subfield code="c">©2007.</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 online resource (xxv, 462 pages) :</subfield><subfield code="b">illustrations</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="a">text</subfield><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="a">computer</subfield><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="a">online resource</subfield><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">The Morgan Kaufmann series in systems on silicon</subfield></datafield><datafield tag="504" ind1=" " ind2=" "><subfield code="a">Includes bibliographical references and index.</subfield></datafield><datafield tag="505" ind1="0" ind2=" "><subfield code="a">CHAPTER 1 WHAT IS ESL?. CHAPTER 2 TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL CHAPTER 3 EVOLUTION OF ESL DEVELOPMENT CHAPTER 4 WHAT ARE THE ENABLERS OF ESL?. CHAPTER 5 ESL FLOW. CHAPTER 6 SPECIFICATIONS AND MODELING. CHAPTER 7 PRE-PARTITIONING ANALYSIS. CHAPTER 8 PARTITIONING. CHAPTER 9 POST-PARTITIONING ANALYSIS AND DEBUG CHAPTER 10 POST-PARTITIONING VERIFICATION. CHAPTER 11 HARDWARE IMPLEMENTATION. CHAPTER 12 SOFTWARE IMPLEMENTATION. CHAPTER 13 USE OF ESL FOR IMPLEMENTATION VERIFICATION CHAPTER 14 RESEARCH, EMERGING AND FUTURE PROSPECTS. APPENDIX: LIST OF ACRONYMS.</subfield></datafield><datafield tag="520" ind1="8" ind2=" "><subfield code="a">Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Visit the authors' companion site! http://www.electronicsystemlevel.com/ * Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts</subfield></datafield><datafield tag="588" ind1="0" ind2=" "><subfield code="a">Print version record.</subfield></datafield><datafield tag="546" ind1=" " ind2=" "><subfield code="a">English.</subfield></datafield><datafield tag="650" ind1=" " ind2="0"><subfield code="a">Systems on a chip</subfield><subfield code="x">Design and construction.</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">TECHNOLOGY & ENGINEERING</subfield><subfield code="x">Electronics</subfield><subfield code="x">Circuits</subfield><subfield code="x">Integrated.</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">TECHNOLOGY & ENGINEERING</subfield><subfield code="x">Electronics</subfield><subfield code="x">Circuits</subfield><subfield code="x">General.</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Systems on a chip</subfield><subfield code="x">Design and construction.</subfield><subfield code="2">blmlsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Systems on a chip</subfield><subfield code="x">Design and construction</subfield><subfield code="2">fast</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="a">dissertations.</subfield><subfield code="2">aat</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="a">Academic theses</subfield><subfield code="2">fast</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="a">Academic theses.</subfield><subfield code="2">lcgft</subfield><subfield code="0">http://id.loc.gov/authorities/genreForms/gf2014026039</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="a">Thèses et écrits académiques.</subfield><subfield code="2">rvmgf</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Martin, Grant</subfield><subfield code="q">(Grant Edmund)</subfield><subfield code="1">https://id.oclc.org/worldcat/entity/E39PCjMw46xwx79CwgPpfJvT73</subfield><subfield code="0">http://id.loc.gov/authorities/names/n2003002656</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Piziali, Andrew.</subfield><subfield code="0">http://id.loc.gov/authorities/names/n2004011209</subfield></datafield><datafield tag="758" ind1=" " ind2=" "><subfield code="i">has work:</subfield><subfield code="a">ESL design and verification (Text)</subfield><subfield code="1">https://id.oclc.org/worldcat/entity/E39PCH8XhHjW3bQ3jYWXkBVqDC</subfield><subfield code="4">https://id.oclc.org/worldcat/ontology/hasWork</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Print version:</subfield><subfield code="a">Bailey, Brian, 1959-</subfield><subfield code="t">ESL design and verification.</subfield><subfield code="d">Amsterdam ; Boston : Morgan Kaufmann, ©2007</subfield><subfield code="z">9780123735515</subfield><subfield code="z">0123735513</subfield><subfield code="w">(DLC) 2006103541</subfield><subfield code="w">(OCoLC)77573915</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">Morgan Kaufmann series in systems on silicon.</subfield><subfield code="0">http://id.loc.gov/authorities/names/n2001146727</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="l">FWS01</subfield><subfield code="p">ZDB-4-EBA</subfield><subfield code="q">FWS_PDA_EBA</subfield><subfield code="u">https://www.sciencedirect.com/science/book/9780123735515</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="l">FWS01</subfield><subfield code="p">ZDB-4-EBA</subfield><subfield code="q">FWS_PDA_EBA</subfield><subfield code="u">https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=196165</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">ebrary</subfield><subfield code="b">EBRY</subfield><subfield code="n">ebr10186468</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">EBSCOhost</subfield><subfield code="b">EBSC</subfield><subfield code="n">196165</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">YBP Library Services</subfield><subfield code="b">YANK</subfield><subfield code="n">2574567</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">Internet Archive</subfield><subfield code="b">INAR</subfield><subfield code="n">esldesignverific0000bail</subfield></datafield><datafield tag="994" ind1=" " ind2=" "><subfield code="a">92</subfield><subfield code="b">GEBAY</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-4-EBA</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-863</subfield></datafield></record></collection> |
| genre | dissertations. aat Academic theses fast Academic theses. lcgft http://id.loc.gov/authorities/genreForms/gf2014026039 Thèses et écrits académiques. rvmgf |
| genre_facet | dissertations. Academic theses Academic theses. Thèses et écrits académiques. |
| id | ZDB-4-EBA-ocn146316668 |
| illustrated | Illustrated |
| indexdate | 2024-11-27T13:16:04Z |
| institution | BVB |
| isbn | 9780080488837 0080488838 1281053538 9781281053534 9786611053536 6611053530 |
| language | English |
| lccn | 2006103541 |
| oclc_num | 146316668 |
| open_access_boolean | |
| owner | MAIN DE-863 DE-BY-FWS |
| owner_facet | MAIN DE-863 DE-BY-FWS |
| physical | 1 online resource (xxv, 462 pages) : illustrations |
| psigel | ZDB-4-EBA |
| publishDate | 2007 |
| publishDateSearch | 2007 |
| publishDateSort | 2007 |
| publisher | Morgan Kaufmann, |
| record_format | marc |
| series | Morgan Kaufmann series in systems on silicon. |
| series2 | The Morgan Kaufmann series in systems on silicon |
| spelling | Bailey, Brian, 1959- https://id.oclc.org/worldcat/entity/E39PCjG8qxpffq8RvJ36jbbgTd http://id.loc.gov/authorities/names/no2005090028 ESL design and verification : a prescription for electronic system-level methodology / Brian Bailey, Grant Martin, Andrew Piziali. Electronic system-level design Amsterdam ; Boston : Morgan Kaufmann, ©2007. 1 online resource (xxv, 462 pages) : illustrations text txt rdacontent computer c rdamedia online resource cr rdacarrier The Morgan Kaufmann series in systems on silicon Includes bibliographical references and index. CHAPTER 1 WHAT IS ESL?. CHAPTER 2 TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL CHAPTER 3 EVOLUTION OF ESL DEVELOPMENT CHAPTER 4 WHAT ARE THE ENABLERS OF ESL?. CHAPTER 5 ESL FLOW. CHAPTER 6 SPECIFICATIONS AND MODELING. CHAPTER 7 PRE-PARTITIONING ANALYSIS. CHAPTER 8 PARTITIONING. CHAPTER 9 POST-PARTITIONING ANALYSIS AND DEBUG CHAPTER 10 POST-PARTITIONING VERIFICATION. CHAPTER 11 HARDWARE IMPLEMENTATION. CHAPTER 12 SOFTWARE IMPLEMENTATION. CHAPTER 13 USE OF ESL FOR IMPLEMENTATION VERIFICATION CHAPTER 14 RESEARCH, EMERGING AND FUTURE PROSPECTS. APPENDIX: LIST OF ACRONYMS. Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Visit the authors' companion site! http://www.electronicsystemlevel.com/ * Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts Print version record. English. Systems on a chip Design and construction. TECHNOLOGY & ENGINEERING Electronics Circuits Integrated. bisacsh TECHNOLOGY & ENGINEERING Electronics Circuits General. bisacsh Systems on a chip Design and construction. blmlsh Systems on a chip Design and construction fast dissertations. aat Academic theses fast Academic theses. lcgft http://id.loc.gov/authorities/genreForms/gf2014026039 Thèses et écrits académiques. rvmgf Martin, Grant (Grant Edmund) https://id.oclc.org/worldcat/entity/E39PCjMw46xwx79CwgPpfJvT73 http://id.loc.gov/authorities/names/n2003002656 Piziali, Andrew. http://id.loc.gov/authorities/names/n2004011209 has work: ESL design and verification (Text) https://id.oclc.org/worldcat/entity/E39PCH8XhHjW3bQ3jYWXkBVqDC https://id.oclc.org/worldcat/ontology/hasWork Print version: Bailey, Brian, 1959- ESL design and verification. Amsterdam ; Boston : Morgan Kaufmann, ©2007 9780123735515 0123735513 (DLC) 2006103541 (OCoLC)77573915 Morgan Kaufmann series in systems on silicon. http://id.loc.gov/authorities/names/n2001146727 FWS01 ZDB-4-EBA FWS_PDA_EBA https://www.sciencedirect.com/science/book/9780123735515 Volltext FWS01 ZDB-4-EBA FWS_PDA_EBA https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=196165 Volltext |
| spellingShingle | Bailey, Brian, 1959- ESL design and verification : a prescription for electronic system-level methodology / Morgan Kaufmann series in systems on silicon. CHAPTER 1 WHAT IS ESL?. CHAPTER 2 TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL CHAPTER 3 EVOLUTION OF ESL DEVELOPMENT CHAPTER 4 WHAT ARE THE ENABLERS OF ESL?. CHAPTER 5 ESL FLOW. CHAPTER 6 SPECIFICATIONS AND MODELING. CHAPTER 7 PRE-PARTITIONING ANALYSIS. CHAPTER 8 PARTITIONING. CHAPTER 9 POST-PARTITIONING ANALYSIS AND DEBUG CHAPTER 10 POST-PARTITIONING VERIFICATION. CHAPTER 11 HARDWARE IMPLEMENTATION. CHAPTER 12 SOFTWARE IMPLEMENTATION. CHAPTER 13 USE OF ESL FOR IMPLEMENTATION VERIFICATION CHAPTER 14 RESEARCH, EMERGING AND FUTURE PROSPECTS. APPENDIX: LIST OF ACRONYMS. Systems on a chip Design and construction. TECHNOLOGY & ENGINEERING Electronics Circuits Integrated. bisacsh TECHNOLOGY & ENGINEERING Electronics Circuits General. bisacsh Systems on a chip Design and construction. blmlsh Systems on a chip Design and construction fast |
| subject_GND | http://id.loc.gov/authorities/genreForms/gf2014026039 |
| title | ESL design and verification : a prescription for electronic system-level methodology / |
| title_alt | Electronic system-level design |
| title_auth | ESL design and verification : a prescription for electronic system-level methodology / |
| title_exact_search | ESL design and verification : a prescription for electronic system-level methodology / |
| title_full | ESL design and verification : a prescription for electronic system-level methodology / Brian Bailey, Grant Martin, Andrew Piziali. |
| title_fullStr | ESL design and verification : a prescription for electronic system-level methodology / Brian Bailey, Grant Martin, Andrew Piziali. |
| title_full_unstemmed | ESL design and verification : a prescription for electronic system-level methodology / Brian Bailey, Grant Martin, Andrew Piziali. |
| title_short | ESL design and verification : |
| title_sort | esl design and verification a prescription for electronic system level methodology |
| title_sub | a prescription for electronic system-level methodology / |
| topic | Systems on a chip Design and construction. TECHNOLOGY & ENGINEERING Electronics Circuits Integrated. bisacsh TECHNOLOGY & ENGINEERING Electronics Circuits General. bisacsh Systems on a chip Design and construction. blmlsh Systems on a chip Design and construction fast |
| topic_facet | Systems on a chip Design and construction. TECHNOLOGY & ENGINEERING Electronics Circuits Integrated. TECHNOLOGY & ENGINEERING Electronics Circuits General. Systems on a chip Design and construction dissertations. Academic theses Academic theses. Thèses et écrits académiques. |
| url | https://www.sciencedirect.com/science/book/9780123735515 https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=196165 |
| work_keys_str_mv | AT baileybrian esldesignandverificationaprescriptionforelectronicsystemlevelmethodology AT martingrant esldesignandverificationaprescriptionforelectronicsystemlevelmethodology AT pizialiandrew esldesignandverificationaprescriptionforelectronicsystemlevelmethodology AT baileybrian electronicsystemleveldesign AT martingrant electronicsystemleveldesign AT pizialiandrew electronicsystemleveldesign |