Demystifying chipmaking /:
This book takes the reader through the actual manufacturing process of making a typical chip, from start to finish, including a detailed discussion of each step, in plain language. The evolution of today's technology is added to the story, as seen through the eyes of the engineers who solved so...
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Weitere Verfasser: | , |
Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Oxford :
Elsevier/Newnes,
©2005.
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Online-Zugang: | Volltext Volltext |
Zusammenfassung: | This book takes the reader through the actual manufacturing process of making a typical chip, from start to finish, including a detailed discussion of each step, in plain language. The evolution of today's technology is added to the story, as seen through the eyes of the engineers who solved some of the problems. The authors are well suited to that discussion since they are three of those same engineers. They have a broad exposure to the industry and its technology that extends all the way back to Shockley Laboratories, the first semiconductor manufacturer in Silicon Valley. The CMOS (Complementary Metal-Oxide-Semiconductor) process flow is the focus of the discussion and is covered in ten chapters. The vast majority of chips made today are fabricated using this general method. In order to ensure that all readers are comfortable with the vocabulary, the first chapter carefully and clearly introduces the science concepts found in later chapters. A chapter is devoted to pointing out the differences in other manufacturing methods, such as the gallium arsenide technology that produces chips for cell phones. In addition, a chapter describing the nature of the semiconductor industry from a business perspective is included. "The entire process of making a chip is surprisingly easy to understand. The part of the story that defies belief is the tiny dimensions: the conducting wires and other structures on a chip are more than a hundred times thinner than a hair - and getting thinner with every new chip design." * Included CD gives the reader a much greater comprehension of the process than a strictly print book with static illustrations provides * Authors are actual engineers who have a broad range of exposure and experience with chip technology * Contains a unique chapter describing the nature of the semiconductor industry from a business perspective |
Beschreibung: | 1 online resource (xvii, 256 pages) : illustrations |
Bibliographie: | Includes bibliographical references (pages 251-252) and index. |
ISBN: | 1423723503 9781423723509 9780750677608 0750677600 0080477097 9780080477091 |
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100 | 1 | |a Yanda, Richard F. |0 http://id.loc.gov/authorities/names/no2006112932 | |
245 | 1 | 0 | |a Demystifying chipmaking / |c Richard F. Yanda, Michael Heynes, Anne Miller. |
260 | |a Oxford : |b Elsevier/Newnes, |c ©2005. | ||
300 | |a 1 online resource (xvii, 256 pages) : |b illustrations | ||
336 | |a text |b txt |2 rdacontent | ||
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338 | |a online resource |b cr |2 rdacarrier | ||
504 | |a Includes bibliographical references (pages 251-252) and index. | ||
525 | |a Includes DVD. | ||
588 | 0 | |a Print version record. | |
505 | 0 | |a CH 1: IC Fabrication Overview / CH 2: Support Technologies / CH 3: Forming Wells / CH 4: Isolate Active Areas (Shallow Trench Isolation) / CH 5: Building the Transistors / CH 6: First Level Metallization / CH 7: Multilevel Metal Interconnects and Dual Damascene / CH 8: Test and Assembly / APPENDIX A: Science Overview / APPENDIX B: Plasma Etch Supplement to Chapter 4. | |
505 | 0 | |a IC fabrication overview -- Introduction -- Support technologies -- Integrated circuit fabrication -- Test and assembly -- Summary -- Support technologies -- Introduction -- Contamination control -- Crystal growth and wafer preparation -- Circuit design -- Photomask and reticle preparation -- Forming wells -- Introduction -- Initial oxidation -- Photolithography -- Ion implantation -- Isolate active areas (shallow trench isolation) -- Introduction to shallow trench isolation -- Pad oxide growth -- Silicon Nitride deposition -- Photolithography for photo/etch -- From trenches in silicon dioxide -- Chemical mechanical polishing (CMP) to remove excess dioxide -- Wet etch removal of Silicon Nitride and pad oxide -- Building the transistors -- Introduction -- Thin film formation -- Poly gate formation -- Source/drain formation -- Salicide formation -- First level metallization -- Introduction -- Nitride and oxide depositions -- CMP planarization -- Photo/etch for contact holes -- Tungsten plug process -- Low-k dielectric process -- Copper first level interconnection process -- Multilevel metal interconnects and dual damascene -- Introduction -- Deposit barrier layer and intermetal dielectric -- Dual damascene process -- Form bonding pads -- Final passivation process -- Test and assembly -- Introduction -- Wafer and chip testing -- Assembly and packaging. | |
520 | |a This book takes the reader through the actual manufacturing process of making a typical chip, from start to finish, including a detailed discussion of each step, in plain language. The evolution of today's technology is added to the story, as seen through the eyes of the engineers who solved some of the problems. The authors are well suited to that discussion since they are three of those same engineers. They have a broad exposure to the industry and its technology that extends all the way back to Shockley Laboratories, the first semiconductor manufacturer in Silicon Valley. The CMOS (Complementary Metal-Oxide-Semiconductor) process flow is the focus of the discussion and is covered in ten chapters. The vast majority of chips made today are fabricated using this general method. In order to ensure that all readers are comfortable with the vocabulary, the first chapter carefully and clearly introduces the science concepts found in later chapters. A chapter is devoted to pointing out the differences in other manufacturing methods, such as the gallium arsenide technology that produces chips for cell phones. In addition, a chapter describing the nature of the semiconductor industry from a business perspective is included. "The entire process of making a chip is surprisingly easy to understand. The part of the story that defies belief is the tiny dimensions: the conducting wires and other structures on a chip are more than a hundred times thinner than a hair - and getting thinner with every new chip design." * Included CD gives the reader a much greater comprehension of the process than a strictly print book with static illustrations provides * Authors are actual engineers who have a broad range of exposure and experience with chip technology * Contains a unique chapter describing the nature of the semiconductor industry from a business perspective | ||
650 | 0 | |a Logic circuits |x Design and construction. | |
650 | 0 | |a Metal oxide semiconductors, Complementary. |0 http://id.loc.gov/authorities/subjects/sh85084067 | |
650 | 6 | |a MOS complémentaires. | |
650 | 7 | |a COMPUTERS |x Machine Theory. |2 bisacsh | |
650 | 7 | |a COMPUTERS |x Computer Engineering. |2 bisacsh | |
650 | 7 | |a COMPUTERS |x Hardware |x General. |2 bisacsh | |
650 | 7 | |a Logic circuits |x Design and construction |2 fast | |
650 | 7 | |a Metal oxide semiconductors, Complementary |2 fast | |
655 | 7 | |a dissertations. |2 aat | |
655 | 7 | |a Academic theses |2 fast | |
655 | 7 | |a Academic theses. |2 lcgft |0 http://id.loc.gov/authorities/genreForms/gf2014026039 | |
655 | 7 | |a Thèses et écrits académiques. |2 rvmgf | |
700 | 1 | |a Heynes, Michael. |0 http://id.loc.gov/authorities/names/n2003084455 | |
700 | 1 | |a Miller, Anne K. |0 http://id.loc.gov/authorities/names/n2003084460 | |
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DE-BY-FWS_katkey | ZDB-4-EBA-ocm61408593 |
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adam_text | |
any_adam_object | |
author | Yanda, Richard F. |
author2 | Heynes, Michael Miller, Anne K. |
author2_role | |
author2_variant | m h mh a k m ak akm |
author_GND | http://id.loc.gov/authorities/names/no2006112932 http://id.loc.gov/authorities/names/n2003084455 http://id.loc.gov/authorities/names/n2003084460 |
author_facet | Yanda, Richard F. Heynes, Michael Miller, Anne K. |
author_role | |
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callnumber-first | T - Technology |
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callnumber-search | TK7868.L6 Y34 2004eb |
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contents | CH 1: IC Fabrication Overview / CH 2: Support Technologies / CH 3: Forming Wells / CH 4: Isolate Active Areas (Shallow Trench Isolation) / CH 5: Building the Transistors / CH 6: First Level Metallization / CH 7: Multilevel Metal Interconnects and Dual Damascene / CH 8: Test and Assembly / APPENDIX A: Science Overview / APPENDIX B: Plasma Etch Supplement to Chapter 4. IC fabrication overview -- Introduction -- Support technologies -- Integrated circuit fabrication -- Test and assembly -- Summary -- Support technologies -- Introduction -- Contamination control -- Crystal growth and wafer preparation -- Circuit design -- Photomask and reticle preparation -- Forming wells -- Introduction -- Initial oxidation -- Photolithography -- Ion implantation -- Isolate active areas (shallow trench isolation) -- Introduction to shallow trench isolation -- Pad oxide growth -- Silicon Nitride deposition -- Photolithography for photo/etch -- From trenches in silicon dioxide -- Chemical mechanical polishing (CMP) to remove excess dioxide -- Wet etch removal of Silicon Nitride and pad oxide -- Building the transistors -- Introduction -- Thin film formation -- Poly gate formation -- Source/drain formation -- Salicide formation -- First level metallization -- Introduction -- Nitride and oxide depositions -- CMP planarization -- Photo/etch for contact holes -- Tungsten plug process -- Low-k dielectric process -- Copper first level interconnection process -- Multilevel metal interconnects and dual damascene -- Introduction -- Deposit barrier layer and intermetal dielectric -- Dual damascene process -- Form bonding pads -- Final passivation process -- Test and assembly -- Introduction -- Wafer and chip testing -- Assembly and packaging. |
ctrlnum | (OCoLC)61408593 |
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dewey-ones | 621 - Applied physics |
dewey-raw | 621.39732 |
dewey-search | 621.39732 |
dewey-sort | 3621.39732 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
format | Electronic eBook |
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The evolution of today's technology is added to the story, as seen through the eyes of the engineers who solved some of the problems. The authors are well suited to that discussion since they are three of those same engineers. They have a broad exposure to the industry and its technology that extends all the way back to Shockley Laboratories, the first semiconductor manufacturer in Silicon Valley. The CMOS (Complementary Metal-Oxide-Semiconductor) process flow is the focus of the discussion and is covered in ten chapters. The vast majority of chips made today are fabricated using this general method. In order to ensure that all readers are comfortable with the vocabulary, the first chapter carefully and clearly introduces the science concepts found in later chapters. A chapter is devoted to pointing out the differences in other manufacturing methods, such as the gallium arsenide technology that produces chips for cell phones. In addition, a chapter describing the nature of the semiconductor industry from a business perspective is included. "The entire process of making a chip is surprisingly easy to understand. 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genre_facet | dissertations. Academic theses Academic theses. Thèses et écrits académiques. |
id | ZDB-4-EBA-ocm61408593 |
illustrated | Illustrated |
indexdate | 2024-11-27T13:15:46Z |
institution | BVB |
isbn | 1423723503 9781423723509 9780750677608 0750677600 0080477097 9780080477091 |
language | English |
lccn | 2005277383 |
oclc_num | 61408593 |
open_access_boolean | |
owner | MAIN DE-863 DE-BY-FWS |
owner_facet | MAIN DE-863 DE-BY-FWS |
physical | 1 online resource (xvii, 256 pages) : illustrations |
psigel | ZDB-4-EBA |
publishDate | 2005 |
publishDateSearch | 2005 |
publishDateSort | 2005 |
publisher | Elsevier/Newnes, |
record_format | marc |
spelling | Yanda, Richard F. http://id.loc.gov/authorities/names/no2006112932 Demystifying chipmaking / Richard F. Yanda, Michael Heynes, Anne Miller. Oxford : Elsevier/Newnes, ©2005. 1 online resource (xvii, 256 pages) : illustrations text txt rdacontent computer c rdamedia online resource cr rdacarrier Includes bibliographical references (pages 251-252) and index. Includes DVD. Print version record. CH 1: IC Fabrication Overview / CH 2: Support Technologies / CH 3: Forming Wells / CH 4: Isolate Active Areas (Shallow Trench Isolation) / CH 5: Building the Transistors / CH 6: First Level Metallization / CH 7: Multilevel Metal Interconnects and Dual Damascene / CH 8: Test and Assembly / APPENDIX A: Science Overview / APPENDIX B: Plasma Etch Supplement to Chapter 4. IC fabrication overview -- Introduction -- Support technologies -- Integrated circuit fabrication -- Test and assembly -- Summary -- Support technologies -- Introduction -- Contamination control -- Crystal growth and wafer preparation -- Circuit design -- Photomask and reticle preparation -- Forming wells -- Introduction -- Initial oxidation -- Photolithography -- Ion implantation -- Isolate active areas (shallow trench isolation) -- Introduction to shallow trench isolation -- Pad oxide growth -- Silicon Nitride deposition -- Photolithography for photo/etch -- From trenches in silicon dioxide -- Chemical mechanical polishing (CMP) to remove excess dioxide -- Wet etch removal of Silicon Nitride and pad oxide -- Building the transistors -- Introduction -- Thin film formation -- Poly gate formation -- Source/drain formation -- Salicide formation -- First level metallization -- Introduction -- Nitride and oxide depositions -- CMP planarization -- Photo/etch for contact holes -- Tungsten plug process -- Low-k dielectric process -- Copper first level interconnection process -- Multilevel metal interconnects and dual damascene -- Introduction -- Deposit barrier layer and intermetal dielectric -- Dual damascene process -- Form bonding pads -- Final passivation process -- Test and assembly -- Introduction -- Wafer and chip testing -- Assembly and packaging. This book takes the reader through the actual manufacturing process of making a typical chip, from start to finish, including a detailed discussion of each step, in plain language. The evolution of today's technology is added to the story, as seen through the eyes of the engineers who solved some of the problems. The authors are well suited to that discussion since they are three of those same engineers. They have a broad exposure to the industry and its technology that extends all the way back to Shockley Laboratories, the first semiconductor manufacturer in Silicon Valley. The CMOS (Complementary Metal-Oxide-Semiconductor) process flow is the focus of the discussion and is covered in ten chapters. The vast majority of chips made today are fabricated using this general method. In order to ensure that all readers are comfortable with the vocabulary, the first chapter carefully and clearly introduces the science concepts found in later chapters. A chapter is devoted to pointing out the differences in other manufacturing methods, such as the gallium arsenide technology that produces chips for cell phones. In addition, a chapter describing the nature of the semiconductor industry from a business perspective is included. "The entire process of making a chip is surprisingly easy to understand. The part of the story that defies belief is the tiny dimensions: the conducting wires and other structures on a chip are more than a hundred times thinner than a hair - and getting thinner with every new chip design." * Included CD gives the reader a much greater comprehension of the process than a strictly print book with static illustrations provides * Authors are actual engineers who have a broad range of exposure and experience with chip technology * Contains a unique chapter describing the nature of the semiconductor industry from a business perspective Logic circuits Design and construction. Metal oxide semiconductors, Complementary. http://id.loc.gov/authorities/subjects/sh85084067 MOS complémentaires. COMPUTERS Machine Theory. bisacsh COMPUTERS Computer Engineering. bisacsh COMPUTERS Hardware General. bisacsh Logic circuits Design and construction fast Metal oxide semiconductors, Complementary fast dissertations. aat Academic theses fast Academic theses. lcgft http://id.loc.gov/authorities/genreForms/gf2014026039 Thèses et écrits académiques. rvmgf Heynes, Michael. http://id.loc.gov/authorities/names/n2003084455 Miller, Anne K. http://id.loc.gov/authorities/names/n2003084460 has work: Demystifying chipmaking (Text) https://id.oclc.org/worldcat/entity/E39PCFJJ7TVTTgpdrpkqb76mHP https://id.oclc.org/worldcat/ontology/hasWork Print version: Yanda, Richard F. Demystifying chipmaking. Oxford : Elsevier/Newnes, ©2005 0750677600 (DLC) 2005277383 (OCoLC)61130893 FWS01 ZDB-4-EBA FWS_PDA_EBA https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=130229 Volltext FWS01 ZDB-4-EBA FWS_PDA_EBA https://www.sciencedirect.com/science/book/9780750677608 Volltext |
spellingShingle | Yanda, Richard F. Demystifying chipmaking / CH 1: IC Fabrication Overview / CH 2: Support Technologies / CH 3: Forming Wells / CH 4: Isolate Active Areas (Shallow Trench Isolation) / CH 5: Building the Transistors / CH 6: First Level Metallization / CH 7: Multilevel Metal Interconnects and Dual Damascene / CH 8: Test and Assembly / APPENDIX A: Science Overview / APPENDIX B: Plasma Etch Supplement to Chapter 4. IC fabrication overview -- Introduction -- Support technologies -- Integrated circuit fabrication -- Test and assembly -- Summary -- Support technologies -- Introduction -- Contamination control -- Crystal growth and wafer preparation -- Circuit design -- Photomask and reticle preparation -- Forming wells -- Introduction -- Initial oxidation -- Photolithography -- Ion implantation -- Isolate active areas (shallow trench isolation) -- Introduction to shallow trench isolation -- Pad oxide growth -- Silicon Nitride deposition -- Photolithography for photo/etch -- From trenches in silicon dioxide -- Chemical mechanical polishing (CMP) to remove excess dioxide -- Wet etch removal of Silicon Nitride and pad oxide -- Building the transistors -- Introduction -- Thin film formation -- Poly gate formation -- Source/drain formation -- Salicide formation -- First level metallization -- Introduction -- Nitride and oxide depositions -- CMP planarization -- Photo/etch for contact holes -- Tungsten plug process -- Low-k dielectric process -- Copper first level interconnection process -- Multilevel metal interconnects and dual damascene -- Introduction -- Deposit barrier layer and intermetal dielectric -- Dual damascene process -- Form bonding pads -- Final passivation process -- Test and assembly -- Introduction -- Wafer and chip testing -- Assembly and packaging. Logic circuits Design and construction. Metal oxide semiconductors, Complementary. http://id.loc.gov/authorities/subjects/sh85084067 MOS complémentaires. COMPUTERS Machine Theory. bisacsh COMPUTERS Computer Engineering. bisacsh COMPUTERS Hardware General. bisacsh Logic circuits Design and construction fast Metal oxide semiconductors, Complementary fast |
subject_GND | http://id.loc.gov/authorities/subjects/sh85084067 http://id.loc.gov/authorities/genreForms/gf2014026039 |
title | Demystifying chipmaking / |
title_auth | Demystifying chipmaking / |
title_exact_search | Demystifying chipmaking / |
title_full | Demystifying chipmaking / Richard F. Yanda, Michael Heynes, Anne Miller. |
title_fullStr | Demystifying chipmaking / Richard F. Yanda, Michael Heynes, Anne Miller. |
title_full_unstemmed | Demystifying chipmaking / Richard F. Yanda, Michael Heynes, Anne Miller. |
title_short | Demystifying chipmaking / |
title_sort | demystifying chipmaking |
topic | Logic circuits Design and construction. Metal oxide semiconductors, Complementary. http://id.loc.gov/authorities/subjects/sh85084067 MOS complémentaires. COMPUTERS Machine Theory. bisacsh COMPUTERS Computer Engineering. bisacsh COMPUTERS Hardware General. bisacsh Logic circuits Design and construction fast Metal oxide semiconductors, Complementary fast |
topic_facet | Logic circuits Design and construction. Metal oxide semiconductors, Complementary. MOS complémentaires. COMPUTERS Machine Theory. COMPUTERS Computer Engineering. COMPUTERS Hardware General. Logic circuits Design and construction Metal oxide semiconductors, Complementary dissertations. Academic theses Academic theses. Thèses et écrits académiques. |
url | https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=130229 https://www.sciencedirect.com/science/book/9780750677608 |
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