Single-instruction multiple-data execution:
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Cham, Switzerland
Springer
[2015]
|
Schriftenreihe: | Synthesis lectures on computer architecture
32 |
Schlagworte: | |
Beschreibung: | Hier auch später erschienene, unveränderte Nachdrucke |
Beschreibung: | xv, 105 Seiten Illustrationen, Diagramme |
ISBN: | 9783031006180 |
Internformat
MARC
LEADER | 00000nam a22000001cb4500 | ||
---|---|---|---|
001 | BV049690941 | ||
003 | DE-604 | ||
005 | 20240610 | ||
007 | t | ||
008 | 240517s2015 sz a||| |||| 00||| eng d | ||
020 | |a 9783031006180 |9 978-3-031-00618-0 | ||
035 | |a (OCoLC)1443583767 | ||
035 | |a (DE-599)BVBBV049690941 | ||
040 | |a DE-604 |b ger |e rda | ||
041 | 0 | |a eng | |
044 | |a sz |c XA-CH | ||
049 | |a DE-29T | ||
100 | 1 | |a Hughes, Christopher J. |e Verfasser |4 aut | |
245 | 1 | 0 | |a Single-instruction multiple-data execution |c Christopher J. Hughes (Intel) |
264 | 1 | |a Cham, Switzerland |b Springer |c [2015] | |
300 | |a xv, 105 Seiten |b Illustrationen, Diagramme | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
490 | 1 | |a Synthesis lectures on computer architecture |v 32 | |
500 | |a Hier auch später erschienene, unveränderte Nachdrucke | ||
653 | 0 | |a Electronic circuits. | |
653 | 0 | |a Microprocessors. | |
653 | 0 | |a Computer architecture. | |
776 | 0 | 8 | |i Erscheint auch als |n Online-Ausgabe |z 978-3-031-01746-9 |
830 | 0 | |a Synthesis lectures on computer architecture |v 32 |w (DE-604)BV023068349 |9 32 |
Datensatz im Suchindex
_version_ | 1805083856582213632 |
---|---|
adam_text | |
any_adam_object | |
author | Hughes, Christopher J. |
author_facet | Hughes, Christopher J. |
author_role | aut |
author_sort | Hughes, Christopher J. |
author_variant | c j h cj cjh |
building | Verbundindex |
bvnumber | BV049690941 |
ctrlnum | (OCoLC)1443583767 (DE-599)BVBBV049690941 |
format | Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>00000nam a22000001cb4500</leader><controlfield tag="001">BV049690941</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20240610</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">240517s2015 sz a||| |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9783031006180</subfield><subfield code="9">978-3-031-00618-0</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)1443583767</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV049690941</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rda</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="044" ind1=" " ind2=" "><subfield code="a">sz</subfield><subfield code="c">XA-CH</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-29T</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Hughes, Christopher J.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Single-instruction multiple-data execution</subfield><subfield code="c">Christopher J. Hughes (Intel)</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Cham, Switzerland</subfield><subfield code="b">Springer</subfield><subfield code="c">[2015]</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">xv, 105 Seiten</subfield><subfield code="b">Illustrationen, Diagramme</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">Synthesis lectures on computer architecture</subfield><subfield code="v">32</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Hier auch später erschienene, unveränderte Nachdrucke</subfield></datafield><datafield tag="653" ind1=" " ind2="0"><subfield code="a">Electronic circuits.</subfield></datafield><datafield tag="653" ind1=" " ind2="0"><subfield code="a">Microprocessors.</subfield></datafield><datafield tag="653" ind1=" " ind2="0"><subfield code="a">Computer architecture.</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Online-Ausgabe</subfield><subfield code="z">978-3-031-01746-9</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">Synthesis lectures on computer architecture</subfield><subfield code="v">32</subfield><subfield code="w">(DE-604)BV023068349</subfield><subfield code="9">32</subfield></datafield></record></collection> |
id | DE-604.BV049690941 |
illustrated | Illustrated |
indexdate | 2024-07-20T07:55:12Z |
institution | BVB |
isbn | 9783031006180 |
language | English |
oclc_num | 1443583767 |
open_access_boolean | |
owner | DE-29T |
owner_facet | DE-29T |
physical | xv, 105 Seiten Illustrationen, Diagramme |
publishDate | 2015 |
publishDateSearch | 2015 |
publishDateSort | 2015 |
publisher | Springer |
record_format | marc |
series | Synthesis lectures on computer architecture |
series2 | Synthesis lectures on computer architecture |
spelling | Hughes, Christopher J. Verfasser aut Single-instruction multiple-data execution Christopher J. Hughes (Intel) Cham, Switzerland Springer [2015] xv, 105 Seiten Illustrationen, Diagramme txt rdacontent n rdamedia nc rdacarrier Synthesis lectures on computer architecture 32 Hier auch später erschienene, unveränderte Nachdrucke Electronic circuits. Microprocessors. Computer architecture. Erscheint auch als Online-Ausgabe 978-3-031-01746-9 Synthesis lectures on computer architecture 32 (DE-604)BV023068349 32 |
spellingShingle | Hughes, Christopher J. Single-instruction multiple-data execution Synthesis lectures on computer architecture |
title | Single-instruction multiple-data execution |
title_auth | Single-instruction multiple-data execution |
title_exact_search | Single-instruction multiple-data execution |
title_full | Single-instruction multiple-data execution Christopher J. Hughes (Intel) |
title_fullStr | Single-instruction multiple-data execution Christopher J. Hughes (Intel) |
title_full_unstemmed | Single-instruction multiple-data execution Christopher J. Hughes (Intel) |
title_short | Single-instruction multiple-data execution |
title_sort | single instruction multiple data execution |
volume_link | (DE-604)BV023068349 |
work_keys_str_mv | AT hugheschristopherj singleinstructionmultipledataexecution |