Digital logic design using Verilog: Coding and RTL synthesis
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Singapore
Springer
[2022]
|
| Ausgabe: | Second edition |
| Schlagworte: | |
| Beschreibung: | xxv, 604 Seiten Illustrationen, Diagramme (überwiegend farbig) |
| ISBN: | 9789811631986 |
Internformat
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV049590410 | ||
| 003 | DE-604 | ||
| 005 | 20240411 | ||
| 007 | t | ||
| 008 | 240228s2022 a||| |||| 00||| eng d | ||
| 020 | |a 9789811631986 |9 978-981-16-3198-6 | ||
| 035 | |a (OCoLC)1430766902 | ||
| 035 | |a (DE-599)BVBBV049590410 | ||
| 040 | |a DE-604 |b ger |e rda | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-11 | ||
| 082 | 0 | |a 621.3815 |2 23 | |
| 084 | |a ST 250 |0 (DE-625)143626: |2 rvk | ||
| 084 | |a ELT 000 |2 stub | ||
| 084 | |a MAS 000 |2 stub | ||
| 100 | 1 | |a Taraate, Vaibbhav |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Digital logic design using Verilog |b Coding and RTL synthesis |c Vaibbhav Taraate |
| 250 | |a Second edition | ||
| 264 | 1 | |a Singapore |b Springer |c [2022] | |
| 264 | 4 | |c © 2022 | |
| 300 | |a xxv, 604 Seiten |b Illustrationen, Diagramme (überwiegend farbig) | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 4 | |a Electronic Circuits and Systems | |
| 650 | 4 | |a Electronics and Microelectronics, Instrumentation | |
| 650 | 4 | |a Logic Design | |
| 650 | 4 | |a Electronic circuits | |
| 650 | 4 | |a Electronics | |
| 650 | 4 | |a Logic design | |
| 776 | 0 | 8 | |i Erscheint auch als |n Online-Ausgabe |z 978-981-16-3199-3 |
Datensatz im Suchindex
| _version_ | 1805071318935142400 |
|---|---|
| adam_text | |
| adam_txt | |
| any_adam_object | |
| any_adam_object_boolean | |
| author | Taraate, Vaibbhav |
| author_facet | Taraate, Vaibbhav |
| author_role | aut |
| author_sort | Taraate, Vaibbhav |
| author_variant | v t vt |
| building | Verbundindex |
| bvnumber | BV049590410 |
| classification_rvk | ST 250 |
| classification_tum | ELT 000 MAS 000 |
| ctrlnum | (OCoLC)1430766902 (DE-599)BVBBV049590410 |
| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik Maschinenbau |
| discipline_str_mv | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik Maschinenbau |
| edition | Second edition |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>00000nam a2200000 c 4500</leader><controlfield tag="001">BV049590410</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20240411</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">240228s2022 a||| |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9789811631986</subfield><subfield code="9">978-981-16-3198-6</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)1430766902</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV049590410</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rda</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-11</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815</subfield><subfield code="2">23</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 250</subfield><subfield code="0">(DE-625)143626:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ELT 000</subfield><subfield code="2">stub</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">MAS 000</subfield><subfield code="2">stub</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Taraate, Vaibbhav</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Digital logic design using Verilog</subfield><subfield code="b">Coding and RTL synthesis</subfield><subfield code="c">Vaibbhav Taraate</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">Second edition</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Singapore</subfield><subfield code="b">Springer</subfield><subfield code="c">[2022]</subfield></datafield><datafield tag="264" ind1=" " ind2="4"><subfield code="c">© 2022</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">xxv, 604 Seiten</subfield><subfield code="b">Illustrationen, Diagramme (überwiegend farbig)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic Circuits and Systems</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronics and Microelectronics, Instrumentation</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic Design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic circuits</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronics</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic design</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Online-Ausgabe</subfield><subfield code="z">978-981-16-3199-3</subfield></datafield></record></collection> |
| id | DE-604.BV049590410 |
| illustrated | Illustrated |
| index_date | 2024-07-03T23:33:17Z |
| indexdate | 2024-07-20T04:35:55Z |
| institution | BVB |
| isbn | 9789811631986 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-034935098 |
| oclc_num | 1430766902 |
| open_access_boolean | |
| owner | DE-11 |
| owner_facet | DE-11 |
| physical | xxv, 604 Seiten Illustrationen, Diagramme (überwiegend farbig) |
| publishDate | 2022 |
| publishDateSearch | 2022 |
| publishDateSort | 2022 |
| publisher | Springer |
| record_format | marc |
| spelling | Taraate, Vaibbhav Verfasser aut Digital logic design using Verilog Coding and RTL synthesis Vaibbhav Taraate Second edition Singapore Springer [2022] © 2022 xxv, 604 Seiten Illustrationen, Diagramme (überwiegend farbig) txt rdacontent n rdamedia nc rdacarrier Electronic Circuits and Systems Electronics and Microelectronics, Instrumentation Logic Design Electronic circuits Electronics Logic design Erscheint auch als Online-Ausgabe 978-981-16-3199-3 |
| spellingShingle | Taraate, Vaibbhav Digital logic design using Verilog Coding and RTL synthesis Electronic Circuits and Systems Electronics and Microelectronics, Instrumentation Logic Design Electronic circuits Electronics Logic design |
| title | Digital logic design using Verilog Coding and RTL synthesis |
| title_auth | Digital logic design using Verilog Coding and RTL synthesis |
| title_exact_search | Digital logic design using Verilog Coding and RTL synthesis |
| title_exact_search_txtP | Digital logic design using Verilog Coding and RTL synthesis |
| title_full | Digital logic design using Verilog Coding and RTL synthesis Vaibbhav Taraate |
| title_fullStr | Digital logic design using Verilog Coding and RTL synthesis Vaibbhav Taraate |
| title_full_unstemmed | Digital logic design using Verilog Coding and RTL synthesis Vaibbhav Taraate |
| title_short | Digital logic design using Verilog |
| title_sort | digital logic design using verilog coding and rtl synthesis |
| title_sub | Coding and RTL synthesis |
| topic | Electronic Circuits and Systems Electronics and Microelectronics, Instrumentation Logic Design Electronic circuits Electronics Logic design |
| topic_facet | Electronic Circuits and Systems Electronics and Microelectronics, Instrumentation Logic Design Electronic circuits Electronics Logic design |
| work_keys_str_mv | AT taraatevaibbhav digitallogicdesignusingverilogcodingandrtlsynthesis |