Towards efficient resource allocation for embedded systems:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Abschlussarbeit Buch |
| Sprache: | English |
| Veröffentlicht: |
Dresden
Vogt
2023
|
| Schriftenreihe: | Beiträge aus der Informationstechnik
[...], Mobile Nachrichtenübertragung ; Nr. 97 |
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis Inhaltsverzeichnis |
| Beschreibung: | ix, 127 Seiten Illustrationen 21 cm |
| ISBN: | 9783959470612 |
Internformat
MARC
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| 100 | 1 | |a Hasler, Mattis |d 1986- |e Verfasser |0 (DE-588)1292260750 |4 aut | |
| 245 | 1 | 0 | |a Towards efficient resource allocation for embedded systems |c Mattis Hasler |
| 264 | 1 | |a Dresden |b Vogt |c 2023 | |
| 300 | |a ix, 127 Seiten |b Illustrationen |c 21 cm | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 1 | |a Beiträge aus der Informationstechnik : [...], Mobile Nachrichtenübertragung |v Nr. 97 | |
| 502 | |b Dissertation |c Technische Universität Dresden |d 2022 | ||
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| 653 | |a eingebettete Systeme | ||
| 653 | |a Ressourcenverwaltung | ||
| 653 | |a hardware-software codesign | ||
| 653 | |a Scheduling | ||
| 653 | |a FIFO | ||
| 653 | |a embedded systems | ||
| 653 | |a ressource management | ||
| 653 | |a hardware-software codesign | ||
| 653 | |a scheduling | ||
| 653 | |a FIFO | ||
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| 999 | |a oai:aleph.bib-bvb.de:BVB01-034264588 | ||
Datensatz im Suchindex
| _version_ | 1804185265375281152 |
|---|---|
| adam_text | INHALTSVERZEICHNIS
ZUSAMMENFASSUNG
XI
KURZFASSUNG
XIII
1
INTRODUCTION
1
1.1
MOTIVATION
...................................................................................
1
1.2
THE
MULTIPROCESSOR
SYSTEM
ON
CHIP
ARCHITECTURE
........................
4
1.3
CONCRETE
MPSOC
ARCHITECTURE
...................................................
7
1.3.1
NOC
.................................................................................
7
1.3.2
PROCESSING
CORE
..............................................................
9
1.3.3
MEMORY
MANAGEMENT
.......................................................
11
1.3.4
NETWORKING
UNIT
..............................................................
12
1.4
REPRESENTING
LTE/5G
BASEBAND
PROCESSING
AS
STATIC
DATA
FLOW
.
.
13
1.5
COMPUATION
STACK
......................................................................
15
1.5.1
THE
ALGORITHM
AND
APPLICATION
LAYER
................................
17
1.5.2
THE
LANGUAGE
LAYER
..........................................................
18
1.5.3
THE
RUNTIME
ENVIRONMENT
LAYER
....................................
18
1.5.4
THE
OPERATING
SYSTEM
LAYER
............................................
19
1.5.5
THE
DRIVER
AND
LIBRARY
LAYER
............................................
19
1.5.6
THE
HARDWARE
LAYER
..........................................................
20
1.6
PERFORMANCE
HOTSPOTS
ADDRESSED
..............................................
20
1.7
STATE
OF
THE
ART
...........................................................................
22
1.8
OVERVIEW
OF
THE
WORK
................................................................
23
INHALTSVERZEICHNIS
2
HYBRID
SDF
EXECUTION
25
2.1
ADDRESSED
PERFORMANCE
HOTSPOT
................................................
25
2.2
STATE
OF
THE
ART
............................................................................
26
2.3
STATIC
DATA
FLOW
GRAPHS
...............................................................
27
2.4
RUNTIME
ENVIRONMENT
..................................................................
28
2.5
OVERHEAD
OF
DELOYING
TASKS
TO
A
MPSOC
....................................
30
2.6
INTERPRETATION
OF
SDF
GRAPHS
AS
TASK
GRAPHS
............................
32
2.7
INTERPRETING
SDF
GRAPHS
AS
PROCESS
NETWORKS
............................
34
2.8
HYBRID
INTERPRETATION
.................................................................
34
2.9
GRAPH
TOPOLOGY
CONSIDERATIONS
.................................................
35
2.10
THEORETIC
IMPACT
OF
HYBRID
INTERPRETATION
.................................
37
2.11
SIMULATING
HYBRID
EXECUTION
......................................................
40
2.12
PIPELINE
SDF
GRAPH
EXAMPLE
.......................................................
45
2.13
RANDOM
SDF
GRAPHS
.....................................................................
46
2.14
LTE-LIKE
SDF
GRAPH
.......................................................................
50
2.15
KEY
LEMINGS
..................................................................................
53
3
DISTRIBUTION
OF
MANAGEMENT
55
3.1
ADDRESSED
PERFORMANCE
HOTSPOT
................................................
55
3.2
STATE
OF
THE
ART
...........................................................................
56
3.3
REVISING
DEPLOYMENT
OVERHEAD
.................................................
57
3.4
DISTRIBUTION
OF
OVERHEAD
............................................................
58
3.5
IMPACT
OF
MANAGEMENT
DISTRIBUTION
TO
RESOURCE
UTILIZATION
....
59
3.6
RECONFIGURABILITY
.........................................................................
64
3.7
KEY
LEMINGS
.................................................................................
64
INHALTSVERZEICHNIS
4
SLICED
FIFO
HARDWARE
67
4.1
ADDRESSED
PERFORMANCE
HOTSPOT
..............................................
67
4.2
STATE
OF
THE
ART
...........................................................................
69
4.3
SYSTEM
ENVIRONMENT
...................................................................
71
4.4
SLICED
WINDOWED
FIFO
BUFFER
......................................................
72
4.5
SINGLE
FIFO
EVALUATION
.................................................................
74
4.6
MULTIPLE
FIFO
EVALUTAION
..............................................................
77
4.6.1
TRAFFIC
MODEL
....................................................................
78
4.6.2
EVALUATION
SETUP
..............................................................
80
4.6.3
EFFECTIVE
CHANNEL
BANDWIDTH
............................................
81
4.6.4
MEMORY
ACCESS
MODEL
....................................................
83
4.7
HARDWARE
IMPLEMENTATION
.........................................................
86
4.8
KEY
LEMINGS
.................................................................................
87
5
MESSAGE
PASSING
HARDWARE
91
5.1
ADDRESSED
PERFORMANCE
HOTSPOT
..............................................
92
5.2
STATE
OF
THE
ART
...........................................................................
92
5.3
MESSAGE
PASSING
REGARDED
AS
QUEUEING
....................................
93
5.4
A
REMOTE
DIRECT
MEMORY
ACCESS
BASED
IMPLEMENTATION
.........
95
5.5
HARDWARE
IMPLEMENTATION
CONCEPT
............................................
97
5.6
EVALUTATION
OF
PERFORMANCE
.........................................................
99
5.7
KEY
LEMINGS
...................................................................................
107
6
SUMMARY
109
ABBREVIATIONS
113
SYMBOLS
115
PUBLICATIONS
117
BIBLIOGRAPHY
127
|
| adam_txt |
INHALTSVERZEICHNIS
ZUSAMMENFASSUNG
XI
KURZFASSUNG
XIII
1
INTRODUCTION
1
1.1
MOTIVATION
.
1
1.2
THE
MULTIPROCESSOR
SYSTEM
ON
CHIP
ARCHITECTURE
.
4
1.3
CONCRETE
MPSOC
ARCHITECTURE
.
7
1.3.1
NOC
.
7
1.3.2
PROCESSING
CORE
.
9
1.3.3
MEMORY
MANAGEMENT
.
11
1.3.4
NETWORKING
UNIT
.
12
1.4
REPRESENTING
LTE/5G
BASEBAND
PROCESSING
AS
STATIC
DATA
FLOW
.
.
13
1.5
COMPUATION
STACK
.
15
1.5.1
THE
ALGORITHM
AND
APPLICATION
LAYER
.
17
1.5.2
THE
LANGUAGE
LAYER
.
18
1.5.3
THE
RUNTIME
ENVIRONMENT
LAYER
.
18
1.5.4
THE
OPERATING
SYSTEM
LAYER
.
19
1.5.5
THE
DRIVER
AND
LIBRARY
LAYER
.
19
1.5.6
THE
HARDWARE
LAYER
.
20
1.6
PERFORMANCE
HOTSPOTS
ADDRESSED
.
20
1.7
STATE
OF
THE
ART
.
22
1.8
OVERVIEW
OF
THE
WORK
.
23
INHALTSVERZEICHNIS
2
HYBRID
SDF
EXECUTION
25
2.1
ADDRESSED
PERFORMANCE
HOTSPOT
.
25
2.2
STATE
OF
THE
ART
.
26
2.3
STATIC
DATA
FLOW
GRAPHS
.
27
2.4
RUNTIME
ENVIRONMENT
.
28
2.5
OVERHEAD
OF
DELOYING
TASKS
TO
A
MPSOC
.
30
2.6
INTERPRETATION
OF
SDF
GRAPHS
AS
TASK
GRAPHS
.
32
2.7
INTERPRETING
SDF
GRAPHS
AS
PROCESS
NETWORKS
.
34
2.8
HYBRID
INTERPRETATION
.
34
2.9
GRAPH
TOPOLOGY
CONSIDERATIONS
.
35
2.10
THEORETIC
IMPACT
OF
HYBRID
INTERPRETATION
.
37
2.11
SIMULATING
HYBRID
EXECUTION
.
40
2.12
PIPELINE
SDF
GRAPH
EXAMPLE
.
45
2.13
RANDOM
SDF
GRAPHS
.
46
2.14
LTE-LIKE
SDF
GRAPH
.
50
2.15
KEY
LEMINGS
.
53
3
DISTRIBUTION
OF
MANAGEMENT
55
3.1
ADDRESSED
PERFORMANCE
HOTSPOT
.
55
3.2
STATE
OF
THE
ART
.
56
3.3
REVISING
DEPLOYMENT
OVERHEAD
.
57
3.4
DISTRIBUTION
OF
OVERHEAD
.
58
3.5
IMPACT
OF
MANAGEMENT
DISTRIBUTION
TO
RESOURCE
UTILIZATION
.
59
3.6
RECONFIGURABILITY
.
64
3.7
KEY
LEMINGS
.
64
INHALTSVERZEICHNIS
4
SLICED
FIFO
HARDWARE
67
4.1
ADDRESSED
PERFORMANCE
HOTSPOT
.
67
4.2
STATE
OF
THE
ART
.
69
4.3
SYSTEM
ENVIRONMENT
.
71
4.4
SLICED
WINDOWED
FIFO
BUFFER
.
72
4.5
SINGLE
FIFO
EVALUATION
.
74
4.6
MULTIPLE
FIFO
EVALUTAION
.
77
4.6.1
TRAFFIC
MODEL
.
78
4.6.2
EVALUATION
SETUP
.
80
4.6.3
EFFECTIVE
CHANNEL
BANDWIDTH
.
81
4.6.4
MEMORY
ACCESS
MODEL
.
83
4.7
HARDWARE
IMPLEMENTATION
.
86
4.8
KEY
LEMINGS
.
87
5
MESSAGE
PASSING
HARDWARE
91
5.1
ADDRESSED
PERFORMANCE
HOTSPOT
.
92
5.2
STATE
OF
THE
ART
.
92
5.3
MESSAGE
PASSING
REGARDED
AS
QUEUEING
.
93
5.4
A
REMOTE
DIRECT
MEMORY
ACCESS
BASED
IMPLEMENTATION
.
95
5.5
HARDWARE
IMPLEMENTATION
CONCEPT
.
97
5.6
EVALUTATION
OF
PERFORMANCE
.
99
5.7
KEY
LEMINGS
.
107
6
SUMMARY
109
ABBREVIATIONS
113
SYMBOLS
115
PUBLICATIONS
117
BIBLIOGRAPHY
127 |
| any_adam_object | 1 |
| any_adam_object_boolean | 1 |
| author | Hasler, Mattis 1986- |
| author_GND | (DE-588)1292260750 |
| author_facet | Hasler, Mattis 1986- |
| author_role | aut |
| author_sort | Hasler, Mattis 1986- |
| author_variant | m h mh |
| building | Verbundindex |
| bvnumber | BV049001418 |
| classification_rvk | ST 153 |
| ctrlnum | (OCoLC)1381312308 (DE-599)DNB1285315677 |
| discipline | Informatik |
| discipline_str_mv | Informatik |
| format | Thesis Book |
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| genre_facet | Hochschulschrift |
| id | DE-604.BV049001418 |
| illustrated | Illustrated |
| index_date | 2024-07-03T22:09:32Z |
| indexdate | 2024-07-10T09:52:29Z |
| institution | BVB |
| isbn | 9783959470612 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-034264588 |
| oclc_num | 1381312308 |
| open_access_boolean | |
| owner | DE-83 |
| owner_facet | DE-83 |
| physical | ix, 127 Seiten Illustrationen 21 cm |
| publishDate | 2023 |
| publishDateSearch | 2023 |
| publishDateSort | 2023 |
| publisher | Vogt |
| record_format | marc |
| series | Beiträge aus der Informationstechnik |
| series2 | Beiträge aus der Informationstechnik : [...], Mobile Nachrichtenübertragung |
| spelling | Hasler, Mattis 1986- Verfasser (DE-588)1292260750 aut Towards efficient resource allocation for embedded systems Mattis Hasler Dresden Vogt 2023 ix, 127 Seiten Illustrationen 21 cm txt rdacontent n rdamedia nc rdacarrier Beiträge aus der Informationstechnik : [...], Mobile Nachrichtenübertragung Nr. 97 Dissertation Technische Universität Dresden 2022 Eingebettetes System (DE-588)4396978-1 gnd rswk-swf Mehrprozessorsystem (DE-588)4038397-0 gnd rswk-swf System-on-Chip (DE-588)4740357-3 gnd rswk-swf Scheduling (DE-588)4179449-7 gnd rswk-swf eingebettete Systeme Ressourcenverwaltung hardware-software codesign Scheduling FIFO embedded systems ressource management scheduling (DE-588)4113937-9 Hochschulschrift gnd-content Eingebettetes System (DE-588)4396978-1 s Mehrprozessorsystem (DE-588)4038397-0 s System-on-Chip (DE-588)4740357-3 s Scheduling (DE-588)4179449-7 s DE-604 Beiträge aus der Informationstechnik [...], Mobile Nachrichtenübertragung ; Nr. 97 (DE-604)BV036860359 Nr. 97 B:DE-101 application/pdf https://d-nb.info/1285315677/04 Inhaltsverzeichnis DNB Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=034264588&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Hasler, Mattis 1986- Towards efficient resource allocation for embedded systems Beiträge aus der Informationstechnik Eingebettetes System (DE-588)4396978-1 gnd Mehrprozessorsystem (DE-588)4038397-0 gnd System-on-Chip (DE-588)4740357-3 gnd Scheduling (DE-588)4179449-7 gnd |
| subject_GND | (DE-588)4396978-1 (DE-588)4038397-0 (DE-588)4740357-3 (DE-588)4179449-7 (DE-588)4113937-9 |
| title | Towards efficient resource allocation for embedded systems |
| title_auth | Towards efficient resource allocation for embedded systems |
| title_exact_search | Towards efficient resource allocation for embedded systems |
| title_exact_search_txtP | Towards efficient resource allocation for embedded systems |
| title_full | Towards efficient resource allocation for embedded systems Mattis Hasler |
| title_fullStr | Towards efficient resource allocation for embedded systems Mattis Hasler |
| title_full_unstemmed | Towards efficient resource allocation for embedded systems Mattis Hasler |
| title_short | Towards efficient resource allocation for embedded systems |
| title_sort | towards efficient resource allocation for embedded systems |
| topic | Eingebettetes System (DE-588)4396978-1 gnd Mehrprozessorsystem (DE-588)4038397-0 gnd System-on-Chip (DE-588)4740357-3 gnd Scheduling (DE-588)4179449-7 gnd |
| topic_facet | Eingebettetes System Mehrprozessorsystem System-on-Chip Scheduling Hochschulschrift |
| url | https://d-nb.info/1285315677/04 http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=034264588&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
| volume_link | (DE-604)BV036860359 |
| work_keys_str_mv | AT haslermattis towardsefficientresourceallocationforembeddedsystems |
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Inhaltsverzeichnis