Layout techniques for integrated circuit designers:
Gespeichert in:
1. Verfasser: | |
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Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Boston ; London
Artech House
[2022]
|
Schriftenreihe: | Artech House integrated microsystems library
|
Online-Zugang: | FHI01 TUM01 Volltext Volltext |
Beschreibung: | 1 Online-Ressource (xi, 340 Seiten) Illustrationen, Diagramme |
ISBN: | 9781630819118 |
Internformat
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245 | 1 | 0 | |a Layout techniques for integrated circuit designers |c Mikael Sahrling |
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264 | 4 | |c © 2022 | |
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Datensatz im Suchindex
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author | Sahrling, Mikael 1964- |
author_GND | (DE-588)132696525 |
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format | Electronic eBook |
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id | DE-604.BV048590559 |
illustrated | Not Illustrated |
index_date | 2024-07-03T21:07:15Z |
indexdate | 2024-07-10T09:42:21Z |
institution | BVB |
isbn | 9781630819118 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-033966271 |
oclc_num | 1343120029 |
open_access_boolean | |
owner | DE-91 DE-BY-TUM DE-573 |
owner_facet | DE-91 DE-BY-TUM DE-573 |
physical | 1 Online-Ressource (xi, 340 Seiten) Illustrationen, Diagramme |
psigel | ZDB-203-AHO ZDB-37-IAHO ZDB-203-AHO TUM_Paketkauf_2022 |
publishDate | 2022 |
publishDateSearch | 2022 |
publishDateSort | 2022 |
publisher | Artech House |
record_format | marc |
series2 | Artech House integrated microsystems library |
spelling | Sahrling, Mikael 1964- Verfasser (DE-588)132696525 aut Layout techniques for integrated circuit designers Mikael Sahrling Boston ; London Artech House [2022] © 2022 1 Online-Ressource (xi, 340 Seiten) Illustrationen, Diagramme txt rdacontent c rdamedia cr rdacarrier Artech House integrated microsystems library Erscheint auch als Druck-Ausgabe 978-1-63081-910-1 https://ieeexplore.ieee.org/document/9899385 Aggregator URL des Erstveröffentlichers Volltext https://ebs-patron.eb20.com/AccessTitle/ISBN/9781630819118 Verlag URL des Erstveröffentlichers Volltext |
spellingShingle | Sahrling, Mikael 1964- Layout techniques for integrated circuit designers |
title | Layout techniques for integrated circuit designers |
title_auth | Layout techniques for integrated circuit designers |
title_exact_search | Layout techniques for integrated circuit designers |
title_exact_search_txtP | Layout techniques for integrated circuit designers |
title_full | Layout techniques for integrated circuit designers Mikael Sahrling |
title_fullStr | Layout techniques for integrated circuit designers Mikael Sahrling |
title_full_unstemmed | Layout techniques for integrated circuit designers Mikael Sahrling |
title_short | Layout techniques for integrated circuit designers |
title_sort | layout techniques for integrated circuit designers |
url | https://ieeexplore.ieee.org/document/9899385 https://ebs-patron.eb20.com/AccessTitle/ISBN/9781630819118 |
work_keys_str_mv | AT sahrlingmikael layouttechniquesforintegratedcircuitdesigners |