Guide to computer processor architecture: a RISC-V approach, with high-level synthesis
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Cham
Springer
[2023]
|
| Schriftenreihe: | Undergraduate topics in computer science
|
| Schlagworte: | |
| Beschreibung: | xxv, 438 Seiten 24 cm |
| ISBN: | 3031180224 9783031180224 |
Internformat
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| id | DE-604.BV048548682 |
| illustrated | Not Illustrated |
| index_date | 2024-07-03T20:56:38Z |
| indexdate | 2024-07-10T09:41:10Z |
| institution | BVB |
| isbn | 3031180224 9783031180224 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-033925115 |
| oclc_num | 1369119258 |
| open_access_boolean | |
| owner | DE-706 |
| owner_facet | DE-706 |
| physical | xxv, 438 Seiten 24 cm |
| publishDate | 2023 |
| publishDateSearch | 2023 |
| publishDateSort | 2023 |
| publisher | Springer |
| record_format | marc |
| series2 | Undergraduate topics in computer science |
| spelling | Goossens, Bernard Verfasser (DE-588)1279988223 aut Guide to computer processor architecture a RISC-V approach, with high-level synthesis Bernard Goossens Cham Springer [2023] © 2023 xxv, 438 Seiten 24 cm txt rdacontent n rdamedia nc rdacarrier Undergraduate topics in computer science RISC (DE-588)4191875-7 gnd rswk-swf Computerarchitektur (DE-588)4048717-9 gnd rswk-swf Mikroprozessor (DE-588)4039232-6 gnd rswk-swf Computer architecture RISC microprocessors Computerarchitektur (DE-588)4048717-9 s RISC (DE-588)4191875-7 s Mikroprozessor (DE-588)4039232-6 s DE-604 Erscheint auch als Online-Ausgabe 978-3-031-18023-1 |
| spellingShingle | Goossens, Bernard Guide to computer processor architecture a RISC-V approach, with high-level synthesis RISC (DE-588)4191875-7 gnd Computerarchitektur (DE-588)4048717-9 gnd Mikroprozessor (DE-588)4039232-6 gnd |
| subject_GND | (DE-588)4191875-7 (DE-588)4048717-9 (DE-588)4039232-6 |
| title | Guide to computer processor architecture a RISC-V approach, with high-level synthesis |
| title_auth | Guide to computer processor architecture a RISC-V approach, with high-level synthesis |
| title_exact_search | Guide to computer processor architecture a RISC-V approach, with high-level synthesis |
| title_exact_search_txtP | Guide to computer processor architecture a RISC-V approach, with high-level synthesis |
| title_full | Guide to computer processor architecture a RISC-V approach, with high-level synthesis Bernard Goossens |
| title_fullStr | Guide to computer processor architecture a RISC-V approach, with high-level synthesis Bernard Goossens |
| title_full_unstemmed | Guide to computer processor architecture a RISC-V approach, with high-level synthesis Bernard Goossens |
| title_short | Guide to computer processor architecture |
| title_sort | guide to computer processor architecture a risc v approach with high level synthesis |
| title_sub | a RISC-V approach, with high-level synthesis |
| topic | RISC (DE-588)4191875-7 gnd Computerarchitektur (DE-588)4048717-9 gnd Mikroprozessor (DE-588)4039232-6 gnd |
| topic_facet | RISC Computerarchitektur Mikroprozessor |
| work_keys_str_mv | AT goossensbernard guidetocomputerprocessorarchitectureariscvapproachwithhighlevelsynthesis |