Practical digital design: an introduction to VHDL
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
West Lafayette, Indiana
Purdue University Press
[2022]
|
| Schlagworte: | |
| Beschreibung: | Includes indexes |
| Beschreibung: | xvii, 426 Seiten Illustrationen 24 cm |
| ISBN: | 9781612497662 1612497667 |
Internformat
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV048518718 | ||
| 003 | DE-604 | ||
| 005 | 20230301 | ||
| 007 | t | ||
| 008 | 221018s2022 a||| |||| 00||| eng d | ||
| 020 | |a 9781612497662 |9 9781612497662 | ||
| 020 | |a 1612497667 |9 1612497667 | ||
| 035 | |a (OCoLC)1372485534 | ||
| 035 | |a (DE-599)BVBBV048518718 | ||
| 040 | |a DE-604 |b ger |e rda | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-83 | ||
| 084 | |a ZN 4904 |0 (DE-625)157419: |2 rvk | ||
| 100 | 1 | |a Reidenbach, Bruce |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Practical digital design |b an introduction to VHDL |c Bruce Reidenbach |
| 264 | 1 | |a West Lafayette, Indiana |b Purdue University Press |c [2022] | |
| 264 | 4 | |c © 2022 | |
| 300 | |a xvii, 426 Seiten |b Illustrationen |c 24 cm | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 500 | |a Includes indexes | ||
| 505 | 8 | |a Cover -- PRACTICAL DIGITAL DESIGN -- Title -- Copyright -- Dedication -- TABLE OF CONTENTS -- PREFACE -- ACKNOWLEDGMENTS -- ABOUT THE AUTHOR -- CHAPTER 1 INTRODUCTION -- Target Audience -- A Brief History of Digital Design -- The Need for a Hardware Description Language -- A Brief Tour of a VHDL Model -- CHAPTER 2 SIGNALS, TIME, AND THE SIMULATION CYCLE -- Signals -- Events -- Drivers -- Delta Time -- The Simulation Cycle -- CHAPTER 3 THE VHDL DESIGN ENVIRONMENT -- Modeling Styles -- Design Flow -- Data Types -- Type Definition -- Vector Data Types -- Operators and Precedence | |
| 650 | 0 | 7 | |a VHDL |0 (DE-588)4254792-1 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Hardwarebeschreibungssprache |0 (DE-588)4159102-1 |2 gnd |9 rswk-swf |
| 653 | 0 | |a VHDL (Computer hardware description language) | |
| 653 | 0 | |a Very high speed integrated circuits / Design and construction | |
| 653 | 0 | |a Very high speed integrated circuits / Design and construction | |
| 653 | 0 | |a VHDL (Computer hardware description language) | |
| 689 | 0 | 0 | |a VHDL |0 (DE-588)4254792-1 |D s |
| 689 | 0 | 1 | |a Hardwarebeschreibungssprache |0 (DE-588)4159102-1 |D s |
| 689 | 0 | |5 DE-604 | |
| 776 | 1 | 8 | |i Erscheint auch als |n Online-Ausgabe, PDF |z 9781612497679 |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-033895643 | ||
Datensatz im Suchindex
| _version_ | 1804184503268147200 |
|---|---|
| adam_txt | |
| any_adam_object | |
| any_adam_object_boolean | |
| author | Reidenbach, Bruce |
| author_facet | Reidenbach, Bruce |
| author_role | aut |
| author_sort | Reidenbach, Bruce |
| author_variant | b r br |
| building | Verbundindex |
| bvnumber | BV048518718 |
| classification_rvk | ZN 4904 |
| contents | Cover -- PRACTICAL DIGITAL DESIGN -- Title -- Copyright -- Dedication -- TABLE OF CONTENTS -- PREFACE -- ACKNOWLEDGMENTS -- ABOUT THE AUTHOR -- CHAPTER 1 INTRODUCTION -- Target Audience -- A Brief History of Digital Design -- The Need for a Hardware Description Language -- A Brief Tour of a VHDL Model -- CHAPTER 2 SIGNALS, TIME, AND THE SIMULATION CYCLE -- Signals -- Events -- Drivers -- Delta Time -- The Simulation Cycle -- CHAPTER 3 THE VHDL DESIGN ENVIRONMENT -- Modeling Styles -- Design Flow -- Data Types -- Type Definition -- Vector Data Types -- Operators and Precedence |
| ctrlnum | (OCoLC)1372485534 (DE-599)BVBBV048518718 |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| discipline_str_mv | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV048518718 |
| illustrated | Illustrated |
| index_date | 2024-07-03T20:49:15Z |
| indexdate | 2024-07-10T09:40:22Z |
| institution | BVB |
| isbn | 9781612497662 1612497667 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-033895643 |
| oclc_num | 1372485534 |
| open_access_boolean | |
| owner | DE-83 |
| owner_facet | DE-83 |
| physical | xvii, 426 Seiten Illustrationen 24 cm |
| publishDate | 2022 |
| publishDateSearch | 2022 |
| publishDateSort | 2022 |
| publisher | Purdue University Press |
| record_format | marc |
| spelling | Reidenbach, Bruce Verfasser aut Practical digital design an introduction to VHDL Bruce Reidenbach West Lafayette, Indiana Purdue University Press [2022] © 2022 xvii, 426 Seiten Illustrationen 24 cm txt rdacontent n rdamedia nc rdacarrier Includes indexes Cover -- PRACTICAL DIGITAL DESIGN -- Title -- Copyright -- Dedication -- TABLE OF CONTENTS -- PREFACE -- ACKNOWLEDGMENTS -- ABOUT THE AUTHOR -- CHAPTER 1 INTRODUCTION -- Target Audience -- A Brief History of Digital Design -- The Need for a Hardware Description Language -- A Brief Tour of a VHDL Model -- CHAPTER 2 SIGNALS, TIME, AND THE SIMULATION CYCLE -- Signals -- Events -- Drivers -- Delta Time -- The Simulation Cycle -- CHAPTER 3 THE VHDL DESIGN ENVIRONMENT -- Modeling Styles -- Design Flow -- Data Types -- Type Definition -- Vector Data Types -- Operators and Precedence VHDL (DE-588)4254792-1 gnd rswk-swf Hardwarebeschreibungssprache (DE-588)4159102-1 gnd rswk-swf VHDL (Computer hardware description language) Very high speed integrated circuits / Design and construction VHDL (DE-588)4254792-1 s Hardwarebeschreibungssprache (DE-588)4159102-1 s DE-604 Erscheint auch als Online-Ausgabe, PDF 9781612497679 |
| spellingShingle | Reidenbach, Bruce Practical digital design an introduction to VHDL Cover -- PRACTICAL DIGITAL DESIGN -- Title -- Copyright -- Dedication -- TABLE OF CONTENTS -- PREFACE -- ACKNOWLEDGMENTS -- ABOUT THE AUTHOR -- CHAPTER 1 INTRODUCTION -- Target Audience -- A Brief History of Digital Design -- The Need for a Hardware Description Language -- A Brief Tour of a VHDL Model -- CHAPTER 2 SIGNALS, TIME, AND THE SIMULATION CYCLE -- Signals -- Events -- Drivers -- Delta Time -- The Simulation Cycle -- CHAPTER 3 THE VHDL DESIGN ENVIRONMENT -- Modeling Styles -- Design Flow -- Data Types -- Type Definition -- Vector Data Types -- Operators and Precedence VHDL (DE-588)4254792-1 gnd Hardwarebeschreibungssprache (DE-588)4159102-1 gnd |
| subject_GND | (DE-588)4254792-1 (DE-588)4159102-1 |
| title | Practical digital design an introduction to VHDL |
| title_auth | Practical digital design an introduction to VHDL |
| title_exact_search | Practical digital design an introduction to VHDL |
| title_exact_search_txtP | Practical digital design an introduction to VHDL |
| title_full | Practical digital design an introduction to VHDL Bruce Reidenbach |
| title_fullStr | Practical digital design an introduction to VHDL Bruce Reidenbach |
| title_full_unstemmed | Practical digital design an introduction to VHDL Bruce Reidenbach |
| title_short | Practical digital design |
| title_sort | practical digital design an introduction to vhdl |
| title_sub | an introduction to VHDL |
| topic | VHDL (DE-588)4254792-1 gnd Hardwarebeschreibungssprache (DE-588)4159102-1 gnd |
| topic_facet | VHDL Hardwarebeschreibungssprache |
| work_keys_str_mv | AT reidenbachbruce practicaldigitaldesignanintroductiontovhdl |