A Novel In-Memory Wallace Tree Multiplier Architecture Using Majority Logic:
Gespeichert in:
Hauptverfasser: | , , |
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Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Erlangen ; Nürnberg
Friedrich-Alexander-Universität Erlangen-Nürnberg
2021
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Schlagworte: | |
Online-Zugang: | Volltext Volltext Volltext |
Beschreibung: | 1 Online-Ressource |
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spelling | Lakshmi, Vijaya Verfasser aut A Novel In-Memory Wallace Tree Multiplier Architecture Using Majority Logic Vijaya Lakshmi, John Reuben, Vikramkumar Pudi Erlangen ; Nürnberg Friedrich-Alexander-Universität Erlangen-Nürnberg 2021 1 Online-Ressource txt rdacontent c rdamedia cr rdacarrier Archivierung/Langzeitarchivierung gewährleistet DE-101 pdager memristor resistive random-access memory (ReRAM) majority logic 1Transistor-1Resistor (1T-1R) von Neumann bottleneck in-memory computing sense amplifier processing-in-memory parallel-prefix adder Wallace Tree multiplier read-out circuit Reuben, John Verfasser aut Pudi, Vikramkumar Verfasser aut Sonderdruck aus IEEE Transactions on Circuits and Systems I: Regular Papers (2021) 10.1109/TCSI.2021.3129827 https://nbn-resolving.org/urn:nbn:de:bvb:29-opus4-179530 Resolving-System kostenfrei Volltext https://d-nb.info/1248366093/34 Langzeitarchivierung Nationalbibliothek kostenfrei Volltext application/pdf https://open.fau.de/handle/openfau/17953 Verlag kostenfrei Volltext 1\p aepkn 0,93339 20211225 DE-101 https://d-nb.info/provenance/plan#aepkn 2\p aepsg 0,97386 20211225 DE-101 https://d-nb.info/provenance/plan#aepsg 3\p npi 20211224 DE-101 https://d-nb.info/provenance/plan#npi |
spellingShingle | Lakshmi, Vijaya Reuben, John Pudi, Vikramkumar A Novel In-Memory Wallace Tree Multiplier Architecture Using Majority Logic |
title | A Novel In-Memory Wallace Tree Multiplier Architecture Using Majority Logic |
title_auth | A Novel In-Memory Wallace Tree Multiplier Architecture Using Majority Logic |
title_exact_search | A Novel In-Memory Wallace Tree Multiplier Architecture Using Majority Logic |
title_exact_search_txtP | A Novel In-Memory Wallace Tree Multiplier Architecture Using Majority Logic |
title_full | A Novel In-Memory Wallace Tree Multiplier Architecture Using Majority Logic Vijaya Lakshmi, John Reuben, Vikramkumar Pudi |
title_fullStr | A Novel In-Memory Wallace Tree Multiplier Architecture Using Majority Logic Vijaya Lakshmi, John Reuben, Vikramkumar Pudi |
title_full_unstemmed | A Novel In-Memory Wallace Tree Multiplier Architecture Using Majority Logic Vijaya Lakshmi, John Reuben, Vikramkumar Pudi |
title_short | A Novel In-Memory Wallace Tree Multiplier Architecture Using Majority Logic |
title_sort | a novel in memory wallace tree multiplier architecture using majority logic |
url | https://nbn-resolving.org/urn:nbn:de:bvb:29-opus4-179530 https://d-nb.info/1248366093/34 https://open.fau.de/handle/openfau/17953 |
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