Dual port SRAM - write path:

Course content reaffirmed: 06/2015--The circuits in the write path from the bit cell through the write drivers and down to the write select circuitry are discussed. Specific analysis is done with one port writing while the other port is reading from the same row. The decoding approach for determinin...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: Sheppard, Doug (VerfasserIn)
Format: Elektronisch Video
Sprache:English
Veröffentlicht: United States IEEE 2011
Schlagworte:
Online-Zugang:FHN01
TUM01
Zusammenfassung:Course content reaffirmed: 06/2015--The circuits in the write path from the bit cell through the write drivers and down to the write select circuitry are discussed. Specific analysis is done with one port writing while the other port is reading from the same row. The decoding approach for determining which bit line is driven low for a write is compared to the decoding required for reading the selected bit line and passing it out to the data out pin. Timing relationships between the key signals for doing a write will be evaluated from SPICE simulations
Beschreibung:Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 17, 2020)
Beschreibung:1 Online-Resource (1 Videodatei, 60 Minuten) color illustrations

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