Dual port SRAM - writing bit cell during word line collision:
Course content reaffirmed: 06/2015--The interaction in the array between the two ports can have some adverse effects that must be evaluated when designing a Dual Port SRAM, especially when one of the ports is doing a write. This tutorial takes a close look at a Word Line collision" that occurs...
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| Main Author: | |
|---|---|
| Format: | Electronic Video |
| Language: | English |
| Published: |
United States
IEEE
2011
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| Subjects: | |
| Online Access: | FHN01 TUM01 |
| Summary: | Course content reaffirmed: 06/2015--The interaction in the array between the two ports can have some adverse effects that must be evaluated when designing a Dual Port SRAM, especially when one of the ports is doing a write. This tutorial takes a close look at a Word Line collision" that occurs when one port is writing while the other port is reading the same row. SPICE simulation waveforms will be evaluated showing the interaction that can occur through the bit cell and affect what happens on the bit lines between the two ports. The situation where both ports access the same bit cell while one port is reading and the other port is writing is also evaluated. |
| Item Description: | Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 17, 2020) |
| Physical Description: | 1 Online-Resource (1 Videodatei, 60 Minuten) color illustrations |
Staff View
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| spelling | Sheppard, Doug Verfasser aut Dual port SRAM - writing bit cell during word line collision Doug Sheppard Dual port static random-access memory - writing bit cell during word line collision United States IEEE 2011 1 Online-Resource (1 Videodatei, 60 Minuten) color illustrations tdi rdacontent c rdamedia cr rdacarrier Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 17, 2020) Course content reaffirmed: 06/2015--The interaction in the array between the two ports can have some adverse effects that must be evaluated when designing a Dual Port SRAM, especially when one of the ports is doing a write. This tutorial takes a close look at a Word Line collision" that occurs when one port is writing while the other port is reading the same row. SPICE simulation waveforms will be evaluated showing the interaction that can occur through the bit cell and affect what happens on the bit lines between the two ports. The situation where both ports access the same bit cell while one port is reading and the other port is writing is also evaluated. Random access memory (DE-588)4017102-4 Film gnd-content |
| spellingShingle | Sheppard, Doug Dual port SRAM - writing bit cell during word line collision Random access memory |
| subject_GND | (DE-588)4017102-4 |
| title | Dual port SRAM - writing bit cell during word line collision |
| title_alt | Dual port static random-access memory - writing bit cell during word line collision |
| title_auth | Dual port SRAM - writing bit cell during word line collision |
| title_exact_search | Dual port SRAM - writing bit cell during word line collision |
| title_exact_search_txtP | Dual port SRAM - writing bit cell during word line collision |
| title_full | Dual port SRAM - writing bit cell during word line collision Doug Sheppard |
| title_fullStr | Dual port SRAM - writing bit cell during word line collision Doug Sheppard |
| title_full_unstemmed | Dual port SRAM - writing bit cell during word line collision Doug Sheppard |
| title_short | Dual port SRAM - writing bit cell during word line collision |
| title_sort | dual port sram writing bit cell during word line collision |
| topic | Random access memory |
| topic_facet | Random access memory Film |
| work_keys_str_mv | AT shepparddoug dualportsramwritingbitcellduringwordlinecollision AT shepparddoug dualportstaticrandomaccessmemorywritingbitcellduringwordlinecollision |