Dual port SRAM - data out buffer:
Course content reaffirmed: 06/2015--There are several important features required for how the data output is controlled and how it drives the data out pin that the customer connects to. This Dual Port tutorial describes the design of the Data Output Buffer and how it is used to latch the data out an...
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| Main Author: | |
|---|---|
| Format: | Electronic Video |
| Language: | English |
| Published: |
United States
IEEE
2011
|
| Subjects: | |
| Online Access: | FHN01 TUM01 |
| Summary: | Course content reaffirmed: 06/2015--There are several important features required for how the data output is controlled and how it drives the data out pin that the customer connects to. This Dual Port tutorial describes the design of the Data Output Buffer and how it is used to latch the data out and hold it valid even into the next cycle. Special pre-charge functions are designed into the buffer to allow for easy ripple thru of data to the output once the sense amp asserts but still will latch and hold the data after it goes back into pre-charge. The design of other features such as the use of OEZ to control when the output is in high Z is discussed. Schematics and waveforms from SPICE simulations will be presented, and the complete read path from when the word line asserts to the output of data at the pin will be evaluated |
| Item Description: | Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 13, 2020) |
| Physical Description: | 1 Online-Resource (1 Videodatei, 60 Minuten) color illustrations |
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| spelling | Sheppard, Doug Verfasser aut Dual port SRAM - data out buffer Doug Sheppard Dual port static random-access memory - data out buffer United States IEEE 2011 1 Online-Resource (1 Videodatei, 60 Minuten) color illustrations tdi rdacontent c rdamedia cr rdacarrier Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 13, 2020) Course content reaffirmed: 06/2015--There are several important features required for how the data output is controlled and how it drives the data out pin that the customer connects to. This Dual Port tutorial describes the design of the Data Output Buffer and how it is used to latch the data out and hold it valid even into the next cycle. Special pre-charge functions are designed into the buffer to allow for easy ripple thru of data to the output once the sense amp asserts but still will latch and hold the data after it goes back into pre-charge. The design of other features such as the use of OEZ to control when the output is in high Z is discussed. Schematics and waveforms from SPICE simulations will be presented, and the complete read path from when the word line asserts to the output of data at the pin will be evaluated Data processing Simulation Random access memory (DE-588)4017102-4 Film gnd-content |
| spellingShingle | Sheppard, Doug Dual port SRAM - data out buffer Data processing Simulation Random access memory |
| subject_GND | (DE-588)4017102-4 |
| title | Dual port SRAM - data out buffer |
| title_alt | Dual port static random-access memory - data out buffer |
| title_auth | Dual port SRAM - data out buffer |
| title_exact_search | Dual port SRAM - data out buffer |
| title_exact_search_txtP | Dual port SRAM - data out buffer |
| title_full | Dual port SRAM - data out buffer Doug Sheppard |
| title_fullStr | Dual port SRAM - data out buffer Doug Sheppard |
| title_full_unstemmed | Dual port SRAM - data out buffer Doug Sheppard |
| title_short | Dual port SRAM - data out buffer |
| title_sort | dual port sram data out buffer |
| topic | Data processing Simulation Random access memory |
| topic_facet | Data processing Simulation Random access memory Film |
| work_keys_str_mv | AT shepparddoug dualportsramdataoutbuffer AT shepparddoug dualportstaticrandomaccessmemorydataoutbuffer |