Dual port SRAM - data out buffer:

Course content reaffirmed: 06/2015--There are several important features required for how the data output is controlled and how it drives the data out pin that the customer connects to. This Dual Port tutorial describes the design of the Data Output Buffer and how it is used to latch the data out an...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: Sheppard, Doug (VerfasserIn)
Format: Elektronisch Video
Sprache:English
Veröffentlicht: United States IEEE 2011
Schlagworte:
Online-Zugang:FHN01
TUM01
Zusammenfassung:Course content reaffirmed: 06/2015--There are several important features required for how the data output is controlled and how it drives the data out pin that the customer connects to. This Dual Port tutorial describes the design of the Data Output Buffer and how it is used to latch the data out and hold it valid even into the next cycle. Special pre-charge functions are designed into the buffer to allow for easy ripple thru of data to the output once the sense amp asserts but still will latch and hold the data after it goes back into pre-charge. The design of other features such as the use of OEZ to control when the output is in high Z is discussed. Schematics and waveforms from SPICE simulations will be presented, and the complete read path from when the word line asserts to the output of data at the pin will be evaluated
Beschreibung:Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 13, 2020)
Beschreibung:1 Online-Resource (1 Videodatei, 60 Minuten) color illustrations

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