Dual port SRAM - memory cell layout and array coupling:
Course content reaffirmed: 06/2015--Analyzing the types of conditions that can cause capacitive coupling between bit lines in a memory array is very critical in assuring that the data from the memory cell will be properly read. The state and location of one memory cell relative to others can influen...
Gespeichert in:
| 1. Verfasser: | |
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| Format: | Elektronisch Video |
| Sprache: | English |
| Veröffentlicht: |
United States
IEEE
2010
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| Schlagworte: | |
| Online-Zugang: | FHN01 TUM01 |
| Zusammenfassung: | Course content reaffirmed: 06/2015--Analyzing the types of conditions that can cause capacitive coupling between bit lines in a memory array is very critical in assuring that the data from the memory cell will be properly read. The state and location of one memory cell relative to others can influence the voltage level that is being sensed. This is made even more complex in the case of a dual port where what is occurring on one port can effect what is occurring on the other port. Interactions between reading one port while writing the other must also be considered. The types of capacitance that can occur from layout is reviewed in this tutorial which focuses on the impact that the layout design of the memory cell has on bit line coupling under several of the conditions mentioned above. An actual layout of a dual port memory cell will be provided in pdf form and trade offs in the design will be discussed |
| Beschreibung: | Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 13, 2020) |
| Beschreibung: | 1 Online-Resource (1 Videodatei, 60 Minuten) color illustrations |
| ISBN: | 9781424462278 |
Internformat
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| spelling | Sheppard, Doug Verfasser aut Dual port SRAM - memory cell layout and array coupling Doug Sheppard Dual port static random-access memory - memory cell layout and array coupling United States IEEE 2010 1 Online-Resource (1 Videodatei, 60 Minuten) color illustrations tdi rdacontent c rdamedia cr rdacarrier Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 13, 2020) Course content reaffirmed: 06/2015--Analyzing the types of conditions that can cause capacitive coupling between bit lines in a memory array is very critical in assuring that the data from the memory cell will be properly read. The state and location of one memory cell relative to others can influence the voltage level that is being sensed. This is made even more complex in the case of a dual port where what is occurring on one port can effect what is occurring on the other port. Interactions between reading one port while writing the other must also be considered. The types of capacitance that can occur from layout is reviewed in this tutorial which focuses on the impact that the layout design of the memory cell has on bit line coupling under several of the conditions mentioned above. An actual layout of a dual port memory cell will be provided in pdf form and trade offs in the design will be discussed Random access memory Couplings (DE-588)4017102-4 Film gnd-content |
| spellingShingle | Sheppard, Doug Dual port SRAM - memory cell layout and array coupling Random access memory Couplings |
| subject_GND | (DE-588)4017102-4 |
| title | Dual port SRAM - memory cell layout and array coupling |
| title_alt | Dual port static random-access memory - memory cell layout and array coupling |
| title_auth | Dual port SRAM - memory cell layout and array coupling |
| title_exact_search | Dual port SRAM - memory cell layout and array coupling |
| title_exact_search_txtP | Dual port SRAM - memory cell layout and array coupling |
| title_full | Dual port SRAM - memory cell layout and array coupling Doug Sheppard |
| title_fullStr | Dual port SRAM - memory cell layout and array coupling Doug Sheppard |
| title_full_unstemmed | Dual port SRAM - memory cell layout and array coupling Doug Sheppard |
| title_short | Dual port SRAM - memory cell layout and array coupling |
| title_sort | dual port sram memory cell layout and array coupling |
| topic | Random access memory Couplings |
| topic_facet | Random access memory Couplings Film |
| work_keys_str_mv | AT shepparddoug dualportsrammemorycelllayoutandarraycoupling AT shepparddoug dualportstaticrandomaccessmemorymemorycelllayoutandarraycoupling |