SRAM design - write path:
Course content reaffirmed: 06/2015--The overall data path of a memory can be divided into two paths - the read path and the write path. This tutorial focuses on the write path of an SRAM. The write path has some unique requirements that the read path does not have, although there are some similariti...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch Video |
| Sprache: | English |
| Veröffentlicht: |
United States
IEEE
2009
|
| Schlagworte: | |
| Online-Zugang: | FHN01 TUM01 |
| Zusammenfassung: | Course content reaffirmed: 06/2015--The overall data path of a memory can be divided into two paths - the read path and the write path. This tutorial focuses on the write path of an SRAM. The write path has some unique requirements that the read path does not have, although there are some similarities as well. This design will include: the internal decoding for a write, the data in buffer and key control circuits along with their timing relationships. The overall integration of the write and read path will be designed thereby making up the complete data path into and out of the memory cell. A complete set of plots are provided along with a SPICE netlist that is extracted from the layout |
| Beschreibung: | Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 12, 2020) |
| Beschreibung: | 1 Online-Resource (1 Videodatei, 60 Minuten) |
| ISBN: | 9781424461349 |
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| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
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| isbn | 9781424461349 |
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| spelling | Sheppard, Doug Verfasser aut SRAM design - write path Doug Sheppard Static random-access memory design - write path United States IEEE 2009 1 Online-Resource (1 Videodatei, 60 Minuten) tdi rdacontent c rdamedia cr rdacarrier Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 12, 2020) Course content reaffirmed: 06/2015--The overall data path of a memory can be divided into two paths - the read path and the write path. This tutorial focuses on the write path of an SRAM. The write path has some unique requirements that the read path does not have, although there are some similarities as well. This design will include: the internal decoding for a write, the data in buffer and key control circuits along with their timing relationships. The overall integration of the write and read path will be designed thereby making up the complete data path into and out of the memory cell. A complete set of plots are provided along with a SPICE netlist that is extracted from the layout Integrated circuits Random access memory (DE-588)4017102-4 Film gnd-content |
| spellingShingle | Sheppard, Doug SRAM design - write path Integrated circuits Random access memory |
| subject_GND | (DE-588)4017102-4 |
| title | SRAM design - write path |
| title_alt | Static random-access memory design - write path |
| title_auth | SRAM design - write path |
| title_exact_search | SRAM design - write path |
| title_exact_search_txtP | SRAM design - write path |
| title_full | SRAM design - write path Doug Sheppard |
| title_fullStr | SRAM design - write path Doug Sheppard |
| title_full_unstemmed | SRAM design - write path Doug Sheppard |
| title_short | SRAM design - write path |
| title_sort | sram design write path |
| topic | Integrated circuits Random access memory |
| topic_facet | Integrated circuits Random access memory Film |
| work_keys_str_mv | AT shepparddoug sramdesignwritepath AT shepparddoug staticrandomaccessmemorydesignwritepath |