Integrated circuit digital design methodology: advanced analysis and simulation
Course content reaffirmed: 06/2015--This tutorial will expand the analysis of delay and fanout to include the additional parasitic capacitance load that occurs from layout. A standardized method for converting capacitance to equivalent gate size will be presented, and the examples from Part 1 will b...
Gespeichert in:
| 1. Verfasser: | |
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| Format: | Elektronisch Video |
| Sprache: | English |
| Veröffentlicht: |
United States
IEEE
2009
|
| Schlagworte: | |
| Online-Zugang: | FHN01 TUM01 |
| Zusammenfassung: | Course content reaffirmed: 06/2015--This tutorial will expand the analysis of delay and fanout to include the additional parasitic capacitance load that occurs from layout. A standardized method for converting capacitance to equivalent gate size will be presented, and the examples from Part 1 will be reworked to include parasitic capacitance. It is imperative that there be a good understanding of how layout causes parasitic capacitance which can greatly affect the performance and functionality of a design. We will evaluate this by first reviewing the basics of layout with substantial focus on the metal interconnect layers and the types of capacitance the various structures create. Finally, a simulation methodology will be presented for incorporating the actual extracted layout into SPICE for an accurate analysis of the design |
| Beschreibung: | Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 10, 2020) |
| Beschreibung: | 1 Online-Resource (1 Videodatei, 60 Minuten) |
| ISBN: | 9781424430031 |
Internformat
MARC
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Datensatz im Suchindex
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| format | Electronic Video |
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| spelling | Sheppard, Doug Verfasser aut Integrated circuit digital design methodology advanced analysis and simulation Doug Sheppard United States IEEE 2009 1 Online-Resource (1 Videodatei, 60 Minuten) tdi rdacontent c rdamedia cr rdacarrier Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 10, 2020) Course content reaffirmed: 06/2015--This tutorial will expand the analysis of delay and fanout to include the additional parasitic capacitance load that occurs from layout. A standardized method for converting capacitance to equivalent gate size will be presented, and the examples from Part 1 will be reworked to include parasitic capacitance. It is imperative that there be a good understanding of how layout causes parasitic capacitance which can greatly affect the performance and functionality of a design. We will evaluate this by first reviewing the basics of layout with substantial focus on the metal interconnect layers and the types of capacitance the various structures create. Finally, a simulation methodology will be presented for incorporating the actual extracted layout into SPICE for an accurate analysis of the design Design Methodology (DE-588)4017102-4 Film gnd-content |
| spellingShingle | Sheppard, Doug Integrated circuit digital design methodology advanced analysis and simulation Design Methodology |
| subject_GND | (DE-588)4017102-4 |
| title | Integrated circuit digital design methodology advanced analysis and simulation |
| title_auth | Integrated circuit digital design methodology advanced analysis and simulation |
| title_exact_search | Integrated circuit digital design methodology advanced analysis and simulation |
| title_exact_search_txtP | Integrated circuit digital design methodology advanced analysis and simulation |
| title_full | Integrated circuit digital design methodology advanced analysis and simulation Doug Sheppard |
| title_fullStr | Integrated circuit digital design methodology advanced analysis and simulation Doug Sheppard |
| title_full_unstemmed | Integrated circuit digital design methodology advanced analysis and simulation Doug Sheppard |
| title_short | Integrated circuit digital design methodology |
| title_sort | integrated circuit digital design methodology advanced analysis and simulation |
| title_sub | advanced analysis and simulation |
| topic | Design Methodology |
| topic_facet | Design Methodology Film |
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