High performance parallel runtimes: design and implementation
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| Hauptverfasser: | , |
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| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Berlin ; Boston
De Gruyter
[2021]
|
| Schriftenreihe: | De Gruyter Graduate
|
| Schlagworte: | |
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| Beschreibung: | XXVII, 328 Seiten Illustrationen, Diagramme 24 cm, 602 g |
| ISBN: | 9783110632682 3110632683 |
Internformat
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| 100 | 1 | |a Klemm, Michael |e Verfasser |0 (DE-588)1230094407 |4 aut | |
| 245 | 1 | 0 | |a High performance parallel runtimes |b design and implementation |c Michael Klemm, Jim Cownie |
| 264 | 1 | |a Berlin ; Boston |b De Gruyter |c [2021] | |
| 300 | |a XXVII, 328 Seiten |b Illustrationen, Diagramme |c 24 cm, 602 g | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 0 | |a De Gruyter Graduate | |
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| 650 | 0 | 7 | |a Parallelverarbeitung |0 (DE-588)4075860-6 |2 gnd |9 rswk-swf |
| 653 | |a Runtimes | ||
| 653 | |a Compiler | ||
| 653 | |a Programmieren | ||
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| 700 | 1 | |a Cownie, Jim |0 (DE-588)1230095705 |4 aut | |
| 710 | 2 | |a De Gruyter Oldenbourg |0 (DE-588)1065492103 |4 pbl | |
| 776 | 0 | 8 | |i Erscheint auch als |n Online-Ausgabe, PDF |z 978-3-11-063272-9 |w (DE-604)BV047197965 |
| 776 | 0 | 8 | |i Erscheint auch als |n Online-Ausgabe, EPUB |z 978-3-11-063289-7 |w (DE-604)BV047197965 |
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| 856 | 4 | 2 | |m DNB Datenaustausch |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=032577048&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |3 Inhaltsverzeichnis |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-032577048 | ||
Datensatz im Suchindex
| _version_ | 1804182253503250432 |
|---|---|
| adam_text | CONTENTS
FOREWORD
*
V
PREFACE
*
IX
LIST
OF
FIGURES
*
XVII
LISTINGS
*
XIX
LIST
OF
TABLES
*
XXIII
GLOSSARY
*
XXV
1
SETTING
THE
STAGE
*
1
1.1
STRUCTURE
OF
THE
BOOK
*
1
1.2
DESIGN
SPACE
EXPLORATION
*
3
1.2.1
PARALLELISM
AS
A
LIBRARY
*
3
1.2.2
PARALLELISM
AS
A
LANGUAGE
*
6
1.3
CODE
SAMPLES
*
7
1.4
MACHINE
CONFIGURATIONS
*
8
2
PARALLEL
PROGRAMMING
MODELS
AND
CONCEPTS
*
11
2.1
MULTI-PROCESSING
AND
MULTI-THREADING
*
11
2.1.1
THREADING
BASICS
*
13
2.1.2
THREAD
AFFINITY
*
17
2.1.3
THE
OPENMP
API
FOR
THREAD-BASED
PROGRAMMING
*
18
2.1.4
WORKSHARING
-----
19
2.1.5
OPENMP
THREAD
AFFINITY
*
23
2.2
TASK-BASED
PARALLEL
PROGRAMMING
*
24
2.3
SYNCHRONIZATION
CONSTRUCTS
*
28
2.3.1
MUTUAL
EXCLUSION
WITH
LOCKS
-----
28
2.3.2
BARRIERS,
REDUCTIONS,
AND
LATCHES
*
30
2.3.3
TASK
BARRIERS
*
33
2.3.4
TASK
DEPENDENCES
*
36
2.4
AMDAHL
*
S
LAW
-----
39
2.4.1
PRESENTING
PERFORMANCE
RESULTS
*
40
2.4.2
EFFECT
ON
PERFORMANCE
*
43
2.4.3
MAPPING
OVERHEADS
TO
AMDAHL
*
43
2.4.4
OTHER
VARIANTS
OF
AMDAHL
*
S
LAW
*
44
2.5
CONCLUSIONS
*
46
XII
*
CONTENTS
3
3.1
3.1.1
3.1.2
3.1.3
3.1.4
3.1.5
3.1.6
3.1.7
3.2
3.2.1
3.2.2
3.2.3
3.2.4
3.2.5
3.2.6
3.2.7
3.3
MANY-CORE
AND
MULTI-CORE
COMPUTER
ARCHITECTURES
*
48
EXECUTION
MECHANISMS
*
48
VON
NEUMANN
ARCHITECTURE
AND
IN-ORDER
EXECUTION
*
48
IN-ORDER
PIPELINED
EXECUTION
*
52
OUT-OF-ORDER
EXECUTION
*
54
BRANCH
PREDICTION
-----
58
SUPERSCALAR
EXECUTION
*
59
SIMULTANEOUS
MULTI-THREADING
*
60
SINGLE-INSTRUCTION
MULTIPLE-DATA
*
64
THE
MODERN
MEMORY
SUBSYSTEM
*
66
MEMORY
HIERARCHY
-----
66
MEMORY
MODELS
AND
MEMORY
CONSISTENCY
*
72
CACHES
*
77
CACHE
COHERENCE:
OVERVIEW
*
77
CACHE
COHERENCE:
THE
MESI
PROTOCOL
-----
78
PERFORMANCE
IMPLICATIONS
*
83
NON-UNIFORM
MEMORY
ARCHITECTURES
*
87
CONCLUSIONS
*
89
4
4.1
4.2
4.2.1
4.2.2
4.3
4.4
4.4.1
4.4.2
4.4.3
4.4.4
4.4.5
4.4.6
4.5
4.5.1
4.5.2
4.6
COMPILER
AND
RUNTIME
INTERACTION
*
90
COMPILER
BASICS
*
90
IMPLEMENTING
A
TASK-BASED
PARALLEL
MODEL
*
94
LAMBDA
FUNCTIONS
AND
CLOSURES
*
95
ENQUEUING
TASKS
IN
TBB
-----
96
COMPILERS
FOR
PARALLEL
PROGRAMMING
LANGUAGES
*
99
PARALLEL
CODE-GENERATION
PATTERNS
*
103
CODE
GENERATION
FOR
PARALLEL
REGIONS
*
103
CODE
GENERATION
FOR
THREAD-PARALLEL
LOOPS
*
105
CODE
GENERATION
FOR
SIMD-PARALLEL
LOOPS
*
109
CODE
GENERATION
FOR
SEQUENTIAL
CONSTRUCTS
*
112
CODE
GENERATION
FOR
STATIC
TASKING
*
115
CODE
GENERATION
FOR
DYNAMIC
TASKING
*
115
EXAMPLE
OPENMP
IMPLEMENTATIONS
*
120
GNU
COMPILER
COLLECTION
-----
120
INTEL
COMPILERSAND
THE
LLVM
COMPILER
*
123
CONCLUSIONS
*
126
5
5.1
5.1.1
5.1.2
5.2
FUNDAMENTAL
PARALLEL
RUNTIME
MECHANISMS
*
127
MANAGING
PARALLELISM
*
127
SPAWNING
PARALLELISM
*
127
WAITING
-----
128
MANAGEMENT
OF
PARALLELISM
AND
HARDWARE
STRUCTURE
*
130
CONTENTS
*
XIII
5.2.1
DETECTING
THE
HARDWARE
STRUCTURE
*
130
5.2.2
THREAD
PINNING
-----
132
5.3
MEMORY
MANAGEMENT
IN
PARALLEL
RUNTIME
SYSTEMS
*
134
5.3.1 MEMORY
EFFICIENCY
AND
CACHE
USAGE
*
134
5.3.2
SINGLE-THREADED
MEMORY
ALLOCATORS
*
135
5.3.3
MULTI-THREADED
MEMORY
ALLOCATORS
-----
138
5.3.4
SPECIALIZED
MEMORY
ALLOCATORS
FOR
PARALLEL
RUNTIME
SYSTEMS
*
140
5.3.5
THREAD-LOCAL
STORAGE
*
141
5.3.6
DATA
LAYOUT
OF
THE
THREAD
OBJECTS
*
143
5.4
CONCLUSIONS
------
145
6
MUTUAL
EXCLUSION
AND
ATOMICITY
*
146
6.1
THE
MUTUAL
EXCLUSION
PROBLEM
*
146
6.1.1
HARDWARE
SUPPORT
FOR
LOCKS:
ATOMIC
INSTRUCTIONS
*
148
6.1.2
THE ABA
PROBLEM
-----
151
6.2
SHOULD
WE
BE
WRITING
LOCKING
CODE?
-----
152
6.3
CLASSES
OF
LOCKS
*
153
6.4
PROPERTIES
OF
LOCK
ALGORITHMS
*
153
6.4.1
LOCK-PERFORMANCE
METRICS
*
154
6.5
LOCK
ALGORITH
MS
-----
157
6.5.1
TEST-AND-SET
LOCKS
*
158
6.5.2
TEST
AND
TEST-AND-SET
LOCKS
*
160
6.5.3
TICKET
LOCK
*
161
6.5.4
QUEUING
LOCKS
-----
162
6.6
ACTUAL
CODE
PERFORMANCE
*
163
6.6.1
UNCONTENDED
LOCK
OVERHEAD
*
166
6.6.2
CONTENDED
LOCK
THROUGHPUT
-----
166
6.6.3
PERFORMANCE
CONCLUSIONS
*
169
6.7
HOW
TO
WAIT
-----
171
6.7.1
BACKOFF
STRATEGIES
*
172
6.8
TRANSACTIONAL
SYNCHRONIZATION
*
177
6.8.1
TRANSACTIONAL
SEMANTICS
*
178
6.8.2
IMPLEMENTATION
IN
THE
MESI
PROTOCOL
*
179
6.8.3
TRANSACTIONAL
INSTRUCTIONS
*
180
6.8.4
TRANSACTIONAL
LOCKS
-----
181
6.8.5
COMPARISON
OF
MUTUAL
EXCLUSION
AND
SPECULATION
*
184
6.9
OTHER
SERIALIZING
OPERATIONS
*
185
6.9.1
THE
MASTER
AND
MASKED
CONSTRUCTS
-----
185
6.9.2
THE
SINGLE
CONSTRUCT
-----
186
6.10
ATOMIC
OPERATIONS
-----
187
6.10.1
MAPPING
OF
ATOMIC
INSTRUCTIONS
-----
188
6.10.2
ATOMIC
IMPLEMENTATION
OF
MINIMUM
AND
MAXIMUM
*
190
XIV
-
*
CONTENTS
6.11
6.11.1
6.11.2
CONCLUSIONS
*
192
CONCLUSIONS:
LOCKS
-----
192
CONCLUSIONS:
ATOMIC
OPERATIONS
-----
192
7
7.1
7.2
7.2.1
7.2.2
7.3
7.3.1
7.3.2
7.4
7.5
7.5.1
7.5.2
7.5.3
7.5.4
7.5.5
7.6
7.6.1
7.7
7.7.1
7.8
BARRIERS
AND
REDUCTIONS
*
194
BARRIER
FUNDAMENTALS
*
194
BARRIER
PERFORMANCE
MEASUREMENT
*
196
BARRIER
MICRO-BENCHMARK
*
197
BARRIER
PERFORMANCE
MODELING
*
200
BARRIER
COMPONENTS
*
200
COUNTERS
AND
FLAGS
*
200
BROADCAST
-----203
CATEGORIZATION
OF
BARRIER
ALGORITHMS
*
205
BARRIER
ALGORITHMS
*
206
COUNTING
BARRIER
*
206
ALL-TO-ALL
BARRIER
*
210
BUTTERFLY/HYPERCUBE
BARRIER
*
212
DISSEMINATION
BARRIER
*
213
TREE
CHECK-IN
BARRIERS
*
215
REDUCTIONS
-----
220
PIGGY-BACKING
REDUCTIONS
*
224
ADDITIONAL
OPTIMIZATIONS
*
225
HIERARCHICAL
BARRIERS
*
225
CONCLUSIONS
-----
226
8
8.1
8.2
8.3
8.3.1
8.3.2
8.4
8.5
8.6
8.7
8.7.1
8.7.2
8.8
8.8.1
8.8.2
8.8.3
8.9
SCHEDULING
PARALLEL
LOOPS
*
228
AIMS
OF
SCHEDULING
-----
228
THEORETICAL
LIMITS
ON
SCHEDULING
EFFICIENCY
*
229
FUNDAMENTAL
SCHEDULING
APPROACHES
*
231
STATIC
LOOP
SCHEDULING
*
231
DYNAMIC
LOOP
SCHEDULING
-----
233
MAPPING
TO
CANONICAL
FORM
*
234
COMPILER
LOOP
TRANSFORMATIONS
*
236
MONOTONICITY
OF
LOOP
SCHEDULING
*
239
STATIC-SCHEDULE
IMPLEMENTATION
*
240
BLOCKED
LOOP
SCHEDULES
*
240
BLOCK-CYCLIC
LOOP
SCHEDULING
*
242
DYNAMIC
LOOP
SCHEDULE
IMPLEMENTATION
*
242
GUIDED
SCHEDULING
*
244
MONOTONIC
:
DYNAMIC
-----
245
NONMONOTONIC
:
DYNAMIC
-----
247
EVALUATION
OF
LOOP
SCHEDULES
-----
252
CONTENTS
*
XV
8.10
8.10.1
8.10.2
8.11
OTHER
LOOP-SCHEDULING
APPROACHES
*
255
USING
HISTORY
-----
256
EXPOSING
SCHEDULING
TO
THE
USER
-----
257
CONCLUSIONS
-----
257
9
9.1
9.2
9.2.1
9.2.2
9.3
9.3.1
9.3.2
9.3.3
9.4
9.4.1
9.4.2
9.4.3
9.5
9.5.1
9.5.2
9.6
9.6.1
9.6.2
9.7
RUNTIME
SUPPORT
FOR
TASK-PARALLEL
MODELS
*
259
TASK
DESCRIPTORS
-----
259
TASK
POOL
IMPLEMENTATION
-----
260
SINGLE
TASK
POOL
*
261
MULTI
TASK
POOL
-----
268
TASK
SYNCHRONIZATION
*
276
WAITING
FOR
A
SUBSET
OF
TASKS
*
277
WAITING
FOR
IMMEDIATE
CHILD
TASKS
*
281
TASK
DEPENDENCES
*
286
TASK
SCHEDULING
CONCEPTS
-----
289
TASK-SCHEDULING
POINTS
*
290
BREADTH-FIRST
SCHEDULING
AND
DEPTH-FIRST
SCHEDULING
*
291
TASK
STEALING
-----
292
TASK
SCHEDULING
CONSTRAINTS
-----
296
STACK
SCHEDULING
-----
296
CYCLIC
SCHEDULING
-----
297
MISCELLANEOUS
TASK
TOPICS
*
298
TASK
PRIORITIES
-----
298
TASK
AFFINITY
*
300
CONCLUSIONS
*
303
10
SUMMARY
AND
FINAL
THOUGHTS
*
304
BIBLIOGRAPHY
*
307
INDEX
*
315
LIST
OF
ACRONYMS
*
327
|
| adam_txt |
CONTENTS
FOREWORD
*
V
PREFACE
*
IX
LIST
OF
FIGURES
*
XVII
LISTINGS
*
XIX
LIST
OF
TABLES
*
XXIII
GLOSSARY
*
XXV
1
SETTING
THE
STAGE
*
1
1.1
STRUCTURE
OF
THE
BOOK
*
1
1.2
DESIGN
SPACE
EXPLORATION
*
3
1.2.1
PARALLELISM
AS
A
LIBRARY
*
3
1.2.2
PARALLELISM
AS
A
LANGUAGE
*
6
1.3
CODE
SAMPLES
*
7
1.4
MACHINE
CONFIGURATIONS
*
8
2
PARALLEL
PROGRAMMING
MODELS
AND
CONCEPTS
*
11
2.1
MULTI-PROCESSING
AND
MULTI-THREADING
*
11
2.1.1
THREADING
BASICS
*
13
2.1.2
THREAD
AFFINITY
*
17
2.1.3
THE
OPENMP
API
FOR
THREAD-BASED
PROGRAMMING
*
18
2.1.4
WORKSHARING
-----
19
2.1.5
OPENMP
THREAD
AFFINITY
*
23
2.2
TASK-BASED
PARALLEL
PROGRAMMING
*
24
2.3
SYNCHRONIZATION
CONSTRUCTS
*
28
2.3.1
MUTUAL
EXCLUSION
WITH
LOCKS
-----
28
2.3.2
BARRIERS,
REDUCTIONS,
AND
LATCHES
*
30
2.3.3
TASK
BARRIERS
*
33
2.3.4
TASK
DEPENDENCES
*
36
2.4
AMDAHL
*
S
LAW
-----
39
2.4.1
PRESENTING
PERFORMANCE
RESULTS
*
40
2.4.2
EFFECT
ON
PERFORMANCE
*
43
2.4.3
MAPPING
OVERHEADS
TO
AMDAHL
*
43
2.4.4
OTHER
VARIANTS
OF
AMDAHL
*
S
LAW
*
44
2.5
CONCLUSIONS
*
46
XII
*
CONTENTS
3
3.1
3.1.1
3.1.2
3.1.3
3.1.4
3.1.5
3.1.6
3.1.7
3.2
3.2.1
3.2.2
3.2.3
3.2.4
3.2.5
3.2.6
3.2.7
3.3
MANY-CORE
AND
MULTI-CORE
COMPUTER
ARCHITECTURES
*
48
EXECUTION
MECHANISMS
*
48
VON
NEUMANN
ARCHITECTURE
AND
IN-ORDER
EXECUTION
*
48
IN-ORDER
PIPELINED
EXECUTION
*
52
OUT-OF-ORDER
EXECUTION
*
54
BRANCH
PREDICTION
-----
58
SUPERSCALAR
EXECUTION
*
59
SIMULTANEOUS
MULTI-THREADING
*
60
SINGLE-INSTRUCTION
MULTIPLE-DATA
*
64
THE
MODERN
MEMORY
SUBSYSTEM
*
66
MEMORY
HIERARCHY
-----
66
MEMORY
MODELS
AND
MEMORY
CONSISTENCY
*
72
CACHES
*
77
CACHE
COHERENCE:
OVERVIEW
*
77
CACHE
COHERENCE:
THE
MESI
PROTOCOL
-----
78
PERFORMANCE
IMPLICATIONS
*
83
NON-UNIFORM
MEMORY
ARCHITECTURES
*
87
CONCLUSIONS
*
89
4
4.1
4.2
4.2.1
4.2.2
4.3
4.4
4.4.1
4.4.2
4.4.3
4.4.4
4.4.5
4.4.6
4.5
4.5.1
4.5.2
4.6
COMPILER
AND
RUNTIME
INTERACTION
*
90
COMPILER
BASICS
*
90
IMPLEMENTING
A
TASK-BASED
PARALLEL
MODEL
*
94
LAMBDA
FUNCTIONS
AND
CLOSURES
*
95
ENQUEUING
TASKS
IN
TBB
-----
96
COMPILERS
FOR
PARALLEL
PROGRAMMING
LANGUAGES
*
99
PARALLEL
CODE-GENERATION
PATTERNS
*
103
CODE
GENERATION
FOR
PARALLEL
REGIONS
*
103
CODE
GENERATION
FOR
THREAD-PARALLEL
LOOPS
*
105
CODE
GENERATION
FOR
SIMD-PARALLEL
LOOPS
*
109
CODE
GENERATION
FOR
SEQUENTIAL
CONSTRUCTS
*
112
CODE
GENERATION
FOR
STATIC
TASKING
*
115
CODE
GENERATION
FOR
DYNAMIC
TASKING
*
115
EXAMPLE
OPENMP
IMPLEMENTATIONS
*
120
GNU
COMPILER
COLLECTION
-----
120
INTEL
COMPILERSAND
THE
LLVM
COMPILER
*
123
CONCLUSIONS
*
126
5
5.1
5.1.1
5.1.2
5.2
FUNDAMENTAL
PARALLEL
RUNTIME
MECHANISMS
*
127
MANAGING
PARALLELISM
*
127
SPAWNING
PARALLELISM
*
127
WAITING
-----
128
MANAGEMENT
OF
PARALLELISM
AND
HARDWARE
STRUCTURE
*
130
CONTENTS
*
XIII
5.2.1
DETECTING
THE
HARDWARE
STRUCTURE
*
130
5.2.2
THREAD
PINNING
-----
132
5.3
MEMORY
MANAGEMENT
IN
PARALLEL
RUNTIME
SYSTEMS
*
134
5.3.1 MEMORY
EFFICIENCY
AND
CACHE
USAGE
*
134
5.3.2
SINGLE-THREADED
MEMORY
ALLOCATORS
*
135
5.3.3
MULTI-THREADED
MEMORY
ALLOCATORS
-----
138
5.3.4
SPECIALIZED
MEMORY
ALLOCATORS
FOR
PARALLEL
RUNTIME
SYSTEMS
*
140
5.3.5
THREAD-LOCAL
STORAGE
*
141
5.3.6
DATA
LAYOUT
OF
THE
THREAD
OBJECTS
*
143
5.4
CONCLUSIONS
------
145
6
MUTUAL
EXCLUSION
AND
ATOMICITY
*
146
6.1
THE
MUTUAL
EXCLUSION
PROBLEM
*
146
6.1.1
HARDWARE
SUPPORT
FOR
LOCKS:
ATOMIC
INSTRUCTIONS
*
148
6.1.2
THE ABA
PROBLEM
-----
151
6.2
SHOULD
WE
BE
WRITING
LOCKING
CODE?
-----
152
6.3
CLASSES
OF
LOCKS
*
153
6.4
PROPERTIES
OF
LOCK
ALGORITHMS
*
153
6.4.1
LOCK-PERFORMANCE
METRICS
*
154
6.5
LOCK
ALGORITH
MS
-----
157
6.5.1
TEST-AND-SET
LOCKS
*
158
6.5.2
TEST
AND
TEST-AND-SET
LOCKS
*
160
6.5.3
TICKET
LOCK
*
161
6.5.4
QUEUING
LOCKS
-----
162
6.6
ACTUAL
CODE
PERFORMANCE
*
163
6.6.1
UNCONTENDED
LOCK
OVERHEAD
*
166
6.6.2
CONTENDED
LOCK
THROUGHPUT
-----
166
6.6.3
PERFORMANCE
CONCLUSIONS
*
169
6.7
HOW
TO
WAIT
-----
171
6.7.1
BACKOFF
STRATEGIES
*
172
6.8
TRANSACTIONAL
SYNCHRONIZATION
*
177
6.8.1
TRANSACTIONAL
SEMANTICS
*
178
6.8.2
IMPLEMENTATION
IN
THE
MESI
PROTOCOL
*
179
6.8.3
TRANSACTIONAL
INSTRUCTIONS
*
180
6.8.4
TRANSACTIONAL
LOCKS
-----
181
6.8.5
COMPARISON
OF
MUTUAL
EXCLUSION
AND
SPECULATION
*
184
6.9
OTHER
SERIALIZING
OPERATIONS
*
185
6.9.1
THE
MASTER
AND
MASKED
CONSTRUCTS
-----
185
6.9.2
THE
SINGLE
CONSTRUCT
-----
186
6.10
ATOMIC
OPERATIONS
-----
187
6.10.1
MAPPING
OF
ATOMIC
INSTRUCTIONS
-----
188
6.10.2
ATOMIC
IMPLEMENTATION
OF
MINIMUM
AND
MAXIMUM
*
190
XIV
-
*
CONTENTS
6.11
6.11.1
6.11.2
CONCLUSIONS
*
192
CONCLUSIONS:
LOCKS
-----
192
CONCLUSIONS:
ATOMIC
OPERATIONS
-----
192
7
7.1
7.2
7.2.1
7.2.2
7.3
7.3.1
7.3.2
7.4
7.5
7.5.1
7.5.2
7.5.3
7.5.4
7.5.5
7.6
7.6.1
7.7
7.7.1
7.8
BARRIERS
AND
REDUCTIONS
*
194
BARRIER
FUNDAMENTALS
*
194
BARRIER
PERFORMANCE
MEASUREMENT
*
196
BARRIER
MICRO-BENCHMARK
*
197
BARRIER
PERFORMANCE
MODELING
*
200
BARRIER
COMPONENTS
*
200
COUNTERS
AND
FLAGS
*
200
BROADCAST
-----203
CATEGORIZATION
OF
BARRIER
ALGORITHMS
*
205
BARRIER
ALGORITHMS
*
206
COUNTING
BARRIER
*
206
ALL-TO-ALL
BARRIER
*
210
BUTTERFLY/HYPERCUBE
BARRIER
*
212
DISSEMINATION
BARRIER
*
213
TREE
CHECK-IN
BARRIERS
*
215
REDUCTIONS
-----
220
PIGGY-BACKING
REDUCTIONS
*
224
ADDITIONAL
OPTIMIZATIONS
*
225
HIERARCHICAL
BARRIERS
*
225
CONCLUSIONS
-----
226
8
8.1
8.2
8.3
8.3.1
8.3.2
8.4
8.5
8.6
8.7
8.7.1
8.7.2
8.8
8.8.1
8.8.2
8.8.3
8.9
SCHEDULING
PARALLEL
LOOPS
*
228
AIMS
OF
SCHEDULING
-----
228
THEORETICAL
LIMITS
ON
SCHEDULING
EFFICIENCY
*
229
FUNDAMENTAL
SCHEDULING
APPROACHES
*
231
STATIC
LOOP
SCHEDULING
*
231
DYNAMIC
LOOP
SCHEDULING
-----
233
MAPPING
TO
CANONICAL
FORM
*
234
COMPILER
LOOP
TRANSFORMATIONS
*
236
MONOTONICITY
OF
LOOP
SCHEDULING
*
239
STATIC-SCHEDULE
IMPLEMENTATION
*
240
BLOCKED
LOOP
SCHEDULES
*
240
BLOCK-CYCLIC
LOOP
SCHEDULING
*
242
DYNAMIC
LOOP
SCHEDULE
IMPLEMENTATION
*
242
GUIDED
SCHEDULING
*
244
MONOTONIC
:
DYNAMIC
-----
245
NONMONOTONIC
:
DYNAMIC
-----
247
EVALUATION
OF
LOOP
SCHEDULES
-----
252
CONTENTS
*
XV
8.10
8.10.1
8.10.2
8.11
OTHER
LOOP-SCHEDULING
APPROACHES
*
255
USING
HISTORY
-----
256
EXPOSING
SCHEDULING
TO
THE
USER
-----
257
CONCLUSIONS
-----
257
9
9.1
9.2
9.2.1
9.2.2
9.3
9.3.1
9.3.2
9.3.3
9.4
9.4.1
9.4.2
9.4.3
9.5
9.5.1
9.5.2
9.6
9.6.1
9.6.2
9.7
RUNTIME
SUPPORT
FOR
TASK-PARALLEL
MODELS
*
259
TASK
DESCRIPTORS
-----
259
TASK
POOL
IMPLEMENTATION
-----
260
SINGLE
TASK
POOL
*
261
MULTI
TASK
POOL
-----
268
TASK
SYNCHRONIZATION
*
276
WAITING
FOR
A
SUBSET
OF
TASKS
*
277
WAITING
FOR
IMMEDIATE
CHILD
TASKS
*
281
TASK
DEPENDENCES
*
286
TASK
SCHEDULING
CONCEPTS
-----
289
TASK-SCHEDULING
POINTS
*
290
BREADTH-FIRST
SCHEDULING
AND
DEPTH-FIRST
SCHEDULING
*
291
TASK
STEALING
-----
292
TASK
SCHEDULING
CONSTRAINTS
-----
296
STACK
SCHEDULING
-----
296
CYCLIC
SCHEDULING
-----
297
MISCELLANEOUS
TASK
TOPICS
*
298
TASK
PRIORITIES
-----
298
TASK
AFFINITY
*
300
CONCLUSIONS
*
303
10
SUMMARY
AND
FINAL
THOUGHTS
*
304
BIBLIOGRAPHY
*
307
INDEX
*
315
LIST
OF
ACRONYMS
*
327 |
| any_adam_object | 1 |
| any_adam_object_boolean | 1 |
| author | Klemm, Michael Cownie, Jim |
| author_GND | (DE-588)1230094407 (DE-588)1230095705 |
| author_facet | Klemm, Michael Cownie, Jim |
| author_role | aut aut |
| author_sort | Klemm, Michael |
| author_variant | m k mk j c jc |
| building | Verbundindex |
| bvnumber | BV047171591 |
| classification_rvk | ST 151 ST 152 |
| classification_tum | DAT 280 DAT 212 DAT 383 DAT 510 DAT 216 |
| ctrlnum | (OCoLC)1129463181 (DE-599)DNB1200494083 |
| discipline | Informatik |
| discipline_str_mv | Informatik |
| format | Book |
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| id | DE-604.BV047171591 |
| illustrated | Illustrated |
| index_date | 2024-07-03T16:43:13Z |
| indexdate | 2024-07-10T09:04:37Z |
| institution | BVB |
| institution_GND | (DE-588)1065492103 |
| isbn | 9783110632682 3110632683 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-032577048 |
| oclc_num | 1129463181 |
| open_access_boolean | |
| owner | DE-92 DE-703 DE-20 DE-91G DE-BY-TUM DE-521 |
| owner_facet | DE-92 DE-703 DE-20 DE-91G DE-BY-TUM DE-521 |
| physical | XXVII, 328 Seiten Illustrationen, Diagramme 24 cm, 602 g |
| publishDate | 2021 |
| publishDateSearch | 2021 |
| publishDateSort | 2021 |
| publisher | De Gruyter |
| record_format | marc |
| series2 | De Gruyter Graduate |
| spelling | Klemm, Michael Verfasser (DE-588)1230094407 aut High performance parallel runtimes design and implementation Michael Klemm, Jim Cownie Berlin ; Boston De Gruyter [2021] XXVII, 328 Seiten Illustrationen, Diagramme 24 cm, 602 g txt rdacontent n rdamedia nc rdacarrier De Gruyter Graduate Programmierung (DE-588)4076370-5 gnd rswk-swf Parallelverarbeitung (DE-588)4075860-6 gnd rswk-swf Runtimes Compiler Programmieren TB: Textbook Parallelverarbeitung (DE-588)4075860-6 s Programmierung (DE-588)4076370-5 s DE-604 Cownie, Jim (DE-588)1230095705 aut De Gruyter Oldenbourg (DE-588)1065492103 pbl Erscheint auch als Online-Ausgabe, PDF 978-3-11-063272-9 (DE-604)BV047197965 Erscheint auch als Online-Ausgabe, EPUB 978-3-11-063289-7 (DE-604)BV047197965 X:MVB http://www.degruyter.com/search?f_0=isbnissn&q_0=9783110632682&searchTitles=true B:DE-101 application/pdf https://d-nb.info/1200494083/04 Inhaltsverzeichnis DNB Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=032577048&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Klemm, Michael Cownie, Jim High performance parallel runtimes design and implementation Programmierung (DE-588)4076370-5 gnd Parallelverarbeitung (DE-588)4075860-6 gnd |
| subject_GND | (DE-588)4076370-5 (DE-588)4075860-6 |
| title | High performance parallel runtimes design and implementation |
| title_auth | High performance parallel runtimes design and implementation |
| title_exact_search | High performance parallel runtimes design and implementation |
| title_exact_search_txtP | High performance parallel runtimes design and implementation |
| title_full | High performance parallel runtimes design and implementation Michael Klemm, Jim Cownie |
| title_fullStr | High performance parallel runtimes design and implementation Michael Klemm, Jim Cownie |
| title_full_unstemmed | High performance parallel runtimes design and implementation Michael Klemm, Jim Cownie |
| title_short | High performance parallel runtimes |
| title_sort | high performance parallel runtimes design and implementation |
| title_sub | design and implementation |
| topic | Programmierung (DE-588)4076370-5 gnd Parallelverarbeitung (DE-588)4075860-6 gnd |
| topic_facet | Programmierung Parallelverarbeitung |
| url | http://www.degruyter.com/search?f_0=isbnissn&q_0=9783110632682&searchTitles=true https://d-nb.info/1200494083/04 http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=032577048&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
| work_keys_str_mv | AT klemmmichael highperformanceparallelruntimesdesignandimplementation AT cowniejim highperformanceparallelruntimesdesignandimplementation AT degruyteroldenbourg highperformanceparallelruntimesdesignandimplementation |
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