Towards One-Pass Synthesis:
The design process of digital circuits is often carried out in individual steps, like logic synthesis, mapping, and routing. Since originally the complete process was too complex, it has been split up in several - more or less independen- phases. In the last 40 years powerful algorithms have been de...
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
New York, NY
Springer US
2002
|
| Ausgabe: | 1st ed. 2002 |
| Schlagworte: | |
| Online-Zugang: | UBY01 Volltext |
| Zusammenfassung: | The design process of digital circuits is often carried out in individual steps, like logic synthesis, mapping, and routing. Since originally the complete process was too complex, it has been split up in several - more or less independen- phases. In the last 40 years powerful algorithms have been developed to find optimal solutions for each of these steps. However, the interaction of these different algorithms has not been considered for a long time. This leads to quality loss e. g. in cases where highly optimized netlists fit badly onto the target architecture. Since the resulting circuits are often far from being optimal and insufficient regarding the optimization criteria, like area and delay, several iterations of the complete design process have to be carried out to get high quality results. This is a very time consuming and costly process. For this reason, some years ago the idea of one-pass synthesis came up. There were two main approaches how to guarantee that a design got "first time right" : 1. Combining levels that were split before, e. g. to use layout information already during the logic synthesis phase. 2. Restricting the optimization in one level such that it better fits to the next one. So far, several approaches in these two directions have been presented and new techniques are under development. In this book we describe the new paradigm that is used in one-pass synthesis and present examples for the two techniques above |
| Beschreibung: | 1 Online-Ressource (X, 182 p) |
| ISBN: | 9781475735963 |
| DOI: | 10.1007/978-1-4757-3596-3 |
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| 520 | |a The design process of digital circuits is often carried out in individual steps, like logic synthesis, mapping, and routing. Since originally the complete process was too complex, it has been split up in several - more or less independen- phases. In the last 40 years powerful algorithms have been developed to find optimal solutions for each of these steps. However, the interaction of these different algorithms has not been considered for a long time. This leads to quality loss e. g. in cases where highly optimized netlists fit badly onto the target architecture. Since the resulting circuits are often far from being optimal and insufficient regarding the optimization criteria, like area and delay, several iterations of the complete design process have to be carried out to get high quality results. This is a very time consuming and costly process. For this reason, some years ago the idea of one-pass synthesis came up. There were two main approaches how to guarantee that a design got "first time right" : 1. Combining levels that were split before, e. g. to use layout information already during the logic synthesis phase. 2. Restricting the optimization in one level such that it better fits to the next one. So far, several approaches in these two directions have been presented and new techniques are under development. In this book we describe the new paradigm that is used in one-pass synthesis and present examples for the two techniques above | ||
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| author | Drechsler, Rolf Günther, Wolfgang |
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| discipline | Informatik |
| discipline_str_mv | Informatik |
| doi_str_mv | 10.1007/978-1-4757-3596-3 |
| edition | 1st ed. 2002 |
| format | Electronic eBook |
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| id | DE-604.BV047064802 |
| illustrated | Not Illustrated |
| index_date | 2024-07-03T16:12:23Z |
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| institution | BVB |
| isbn | 9781475735963 |
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| spelling | Drechsler, Rolf Verfasser aut Towards One-Pass Synthesis by Rolf Drechsler, Wolfgang Günther 1st ed. 2002 New York, NY Springer US 2002 1 Online-Ressource (X, 182 p) txt rdacontent c rdamedia cr rdacarrier The design process of digital circuits is often carried out in individual steps, like logic synthesis, mapping, and routing. Since originally the complete process was too complex, it has been split up in several - more or less independen- phases. In the last 40 years powerful algorithms have been developed to find optimal solutions for each of these steps. However, the interaction of these different algorithms has not been considered for a long time. This leads to quality loss e. g. in cases where highly optimized netlists fit badly onto the target architecture. Since the resulting circuits are often far from being optimal and insufficient regarding the optimization criteria, like area and delay, several iterations of the complete design process have to be carried out to get high quality results. This is a very time consuming and costly process. For this reason, some years ago the idea of one-pass synthesis came up. There were two main approaches how to guarantee that a design got "first time right" : 1. Combining levels that were split before, e. g. to use layout information already during the logic synthesis phase. 2. Restricting the optimization in one level such that it better fits to the next one. So far, several approaches in these two directions have been presented and new techniques are under development. In this book we describe the new paradigm that is used in one-pass synthesis and present examples for the two techniques above Computer-Aided Engineering (CAD, CAE) and Design Electrical Engineering Artificial Intelligence Computer-aided engineering Electrical engineering Artificial intelligence Günther, Wolfgang aut Erscheint auch als Druck-Ausgabe 9781441952790 Erscheint auch als Druck-Ausgabe 9781402070440 Erscheint auch als Druck-Ausgabe 9781475735970 https://doi.org/10.1007/978-1-4757-3596-3 Verlag URL des Eerstveröffentlichers Volltext |
| spellingShingle | Drechsler, Rolf Günther, Wolfgang Towards One-Pass Synthesis Computer-Aided Engineering (CAD, CAE) and Design Electrical Engineering Artificial Intelligence Computer-aided engineering Electrical engineering Artificial intelligence |
| title | Towards One-Pass Synthesis |
| title_auth | Towards One-Pass Synthesis |
| title_exact_search | Towards One-Pass Synthesis |
| title_exact_search_txtP | Towards One-Pass Synthesis |
| title_full | Towards One-Pass Synthesis by Rolf Drechsler, Wolfgang Günther |
| title_fullStr | Towards One-Pass Synthesis by Rolf Drechsler, Wolfgang Günther |
| title_full_unstemmed | Towards One-Pass Synthesis by Rolf Drechsler, Wolfgang Günther |
| title_short | Towards One-Pass Synthesis |
| title_sort | towards one pass synthesis |
| topic | Computer-Aided Engineering (CAD, CAE) and Design Electrical Engineering Artificial Intelligence Computer-aided engineering Electrical engineering Artificial intelligence |
| topic_facet | Computer-Aided Engineering (CAD, CAE) and Design Electrical Engineering Artificial Intelligence Computer-aided engineering Electrical engineering Artificial intelligence |
| url | https://doi.org/10.1007/978-1-4757-3596-3 |
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