Floating Gate Devices: Operation and Compact Modeling:
Floating Gate Devices: Operation and Compact Modeling focuses on standard operations and compact modeling of memory devices based on Floating Gate architecture. Floating Gate devices are the building blocks of Flash, EPROM, EEPROM memories. Flash memories, which are the most versatile nonvolatile me...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
New York, NY
Springer US
2004
|
Ausgabe: | 1st ed. 2004 |
Schlagworte: | |
Online-Zugang: | UBY01 Volltext |
Zusammenfassung: | Floating Gate Devices: Operation and Compact Modeling focuses on standard operations and compact modeling of memory devices based on Floating Gate architecture. Floating Gate devices are the building blocks of Flash, EPROM, EEPROM memories. Flash memories, which are the most versatile nonvolatile memories, are widely used to store code (BIOS, Communication protocol, Identification code,) and data (solid-state Hard Disks, Flash cards for digital cameras,). The reader, who deals with Floating Gate memory devices at different levels - from test-structures to complex circuit design - will find an essential explanation on device physics and technology, and also circuit issues which must be fully understood while developing a new device. Device engineers will use this book to find simplified models to design new process steps or new architectures. Circuit designers will find the basic theory to understand the use of compact models to validate circuits against process variations and to evaluate the impact of parameter variations on circuit performances. Floating Gate Devices: Operation and Compact Modeling is meant to be a basic tool for designing the next generation of memory devices based on FG technologies |
Beschreibung: | 1 Online-Ressource (XV, 131 p) |
ISBN: | 9781402026133 |
DOI: | 10.1007/b105299 |
Internformat
MARC
LEADER | 00000nmm a2200000zc 4500 | ||
---|---|---|---|
001 | BV047064046 | ||
003 | DE-604 | ||
005 | 00000000000000.0 | ||
007 | cr|uuu---uuuuu | ||
008 | 201216s2004 |||| o||u| ||||||eng d | ||
020 | |a 9781402026133 |9 978-1-4020-2613-3 | ||
024 | 7 | |a 10.1007/b105299 |2 doi | |
035 | |a (ZDB-2-SCS)978-1-4020-2613-3 | ||
035 | |a (OCoLC)1227479674 | ||
035 | |a (DE-599)BVBBV047064046 | ||
040 | |a DE-604 |b ger |e aacr | ||
041 | 0 | |a eng | |
049 | |a DE-706 | ||
082 | 0 | |a 621.39 |2 23 | |
100 | 1 | |a Pavan, Paolo |e Verfasser |4 aut | |
245 | 1 | 0 | |a Floating Gate Devices: Operation and Compact Modeling |c by Paolo Pavan, Luca Larcher, Andrea Marmiroli |
250 | |a 1st ed. 2004 | ||
264 | 1 | |a New York, NY |b Springer US |c 2004 | |
300 | |a 1 Online-Ressource (XV, 131 p) | ||
336 | |b txt |2 rdacontent | ||
337 | |b c |2 rdamedia | ||
338 | |b cr |2 rdacarrier | ||
520 | |a Floating Gate Devices: Operation and Compact Modeling focuses on standard operations and compact modeling of memory devices based on Floating Gate architecture. Floating Gate devices are the building blocks of Flash, EPROM, EEPROM memories. Flash memories, which are the most versatile nonvolatile memories, are widely used to store code (BIOS, Communication protocol, Identification code,) and data (solid-state Hard Disks, Flash cards for digital cameras,). The reader, who deals with Floating Gate memory devices at different levels - from test-structures to complex circuit design - will find an essential explanation on device physics and technology, and also circuit issues which must be fully understood while developing a new device. Device engineers will use this book to find simplified models to design new process steps or new architectures. Circuit designers will find the basic theory to understand the use of compact models to validate circuits against process variations and to evaluate the impact of parameter variations on circuit performances. Floating Gate Devices: Operation and Compact Modeling is meant to be a basic tool for designing the next generation of memory devices based on FG technologies | ||
650 | 4 | |a Computer Engineering | |
650 | 4 | |a Circuits and Systems | |
650 | 4 | |a Electrical Engineering | |
650 | 4 | |a Processor Architectures | |
650 | 4 | |a Computer engineering | |
650 | 4 | |a Electronic circuits | |
650 | 4 | |a Electrical engineering | |
650 | 4 | |a Microprocessors | |
650 | 0 | 7 | |a Flash-Speicher |0 (DE-588)4518714-9 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Floating-Gate-Struktur |0 (DE-588)4325978-9 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a Floating-Gate-Struktur |0 (DE-588)4325978-9 |D s |
689 | 0 | 1 | |a Flash-Speicher |0 (DE-588)4518714-9 |D s |
689 | 0 | |5 DE-604 | |
700 | 1 | |a Larcher, Luca |4 aut | |
700 | 1 | |a Marmiroli, Andrea |4 aut | |
776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9781441954268 |
776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9781402077319 |
776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9781475784701 |
856 | 4 | 0 | |u https://doi.org/10.1007/b105299 |x Verlag |z URL des Eerstveröffentlichers |3 Volltext |
912 | |a ZDB-2-SCS | ||
940 | 1 | |q ZDB-2-SCS_2000/2004 | |
999 | |a oai:aleph.bib-bvb.de:BVB01-032471158 | ||
966 | e | |u https://doi.org/10.1007/b105299 |l UBY01 |p ZDB-2-SCS |q ZDB-2-SCS_2000/2004 |x Verlag |3 Volltext |
Datensatz im Suchindex
_version_ | 1804182061547782144 |
---|---|
adam_txt | |
any_adam_object | |
any_adam_object_boolean | |
author | Pavan, Paolo Larcher, Luca Marmiroli, Andrea |
author_facet | Pavan, Paolo Larcher, Luca Marmiroli, Andrea |
author_role | aut aut aut |
author_sort | Pavan, Paolo |
author_variant | p p pp l l ll a m am |
building | Verbundindex |
bvnumber | BV047064046 |
collection | ZDB-2-SCS |
ctrlnum | (ZDB-2-SCS)978-1-4020-2613-3 (OCoLC)1227479674 (DE-599)BVBBV047064046 |
dewey-full | 621.39 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.39 |
dewey-search | 621.39 |
dewey-sort | 3621.39 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
discipline_str_mv | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
doi_str_mv | 10.1007/b105299 |
edition | 1st ed. 2004 |
format | Electronic eBook |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>03261nmm a2200577zc 4500</leader><controlfield tag="001">BV047064046</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">201216s2004 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781402026133</subfield><subfield code="9">978-1-4020-2613-3</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/b105299</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-2-SCS)978-1-4020-2613-3</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)1227479674</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV047064046</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-706</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.39</subfield><subfield code="2">23</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Pavan, Paolo</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Floating Gate Devices: Operation and Compact Modeling</subfield><subfield code="c">by Paolo Pavan, Luca Larcher, Andrea Marmiroli</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">1st ed. 2004</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">New York, NY</subfield><subfield code="b">Springer US</subfield><subfield code="c">2004</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (XV, 131 p)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">Floating Gate Devices: Operation and Compact Modeling focuses on standard operations and compact modeling of memory devices based on Floating Gate architecture. Floating Gate devices are the building blocks of Flash, EPROM, EEPROM memories. Flash memories, which are the most versatile nonvolatile memories, are widely used to store code (BIOS, Communication protocol, Identification code,) and data (solid-state Hard Disks, Flash cards for digital cameras,). The reader, who deals with Floating Gate memory devices at different levels - from test-structures to complex circuit design - will find an essential explanation on device physics and technology, and also circuit issues which must be fully understood while developing a new device. Device engineers will use this book to find simplified models to design new process steps or new architectures. Circuit designers will find the basic theory to understand the use of compact models to validate circuits against process variations and to evaluate the impact of parameter variations on circuit performances. Floating Gate Devices: Operation and Compact Modeling is meant to be a basic tool for designing the next generation of memory devices based on FG technologies</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits and Systems</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Processor Architectures</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic circuits</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Microprocessors</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Flash-Speicher</subfield><subfield code="0">(DE-588)4518714-9</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Floating-Gate-Struktur</subfield><subfield code="0">(DE-588)4325978-9</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Floating-Gate-Struktur</subfield><subfield code="0">(DE-588)4325978-9</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Flash-Speicher</subfield><subfield code="0">(DE-588)4518714-9</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Larcher, Luca</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Marmiroli, Andrea</subfield><subfield code="4">aut</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9781441954268</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9781402077319</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9781475784701</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://doi.org/10.1007/b105299</subfield><subfield code="x">Verlag</subfield><subfield code="z">URL des Eerstveröffentlichers</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-SCS</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">ZDB-2-SCS_2000/2004</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-032471158</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/b105299</subfield><subfield code="l">UBY01</subfield><subfield code="p">ZDB-2-SCS</subfield><subfield code="q">ZDB-2-SCS_2000/2004</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
id | DE-604.BV047064046 |
illustrated | Not Illustrated |
index_date | 2024-07-03T16:12:21Z |
indexdate | 2024-07-10T09:01:34Z |
institution | BVB |
isbn | 9781402026133 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-032471158 |
oclc_num | 1227479674 |
open_access_boolean | |
owner | DE-706 |
owner_facet | DE-706 |
physical | 1 Online-Ressource (XV, 131 p) |
psigel | ZDB-2-SCS ZDB-2-SCS_2000/2004 ZDB-2-SCS ZDB-2-SCS_2000/2004 |
publishDate | 2004 |
publishDateSearch | 2004 |
publishDateSort | 2004 |
publisher | Springer US |
record_format | marc |
spelling | Pavan, Paolo Verfasser aut Floating Gate Devices: Operation and Compact Modeling by Paolo Pavan, Luca Larcher, Andrea Marmiroli 1st ed. 2004 New York, NY Springer US 2004 1 Online-Ressource (XV, 131 p) txt rdacontent c rdamedia cr rdacarrier Floating Gate Devices: Operation and Compact Modeling focuses on standard operations and compact modeling of memory devices based on Floating Gate architecture. Floating Gate devices are the building blocks of Flash, EPROM, EEPROM memories. Flash memories, which are the most versatile nonvolatile memories, are widely used to store code (BIOS, Communication protocol, Identification code,) and data (solid-state Hard Disks, Flash cards for digital cameras,). The reader, who deals with Floating Gate memory devices at different levels - from test-structures to complex circuit design - will find an essential explanation on device physics and technology, and also circuit issues which must be fully understood while developing a new device. Device engineers will use this book to find simplified models to design new process steps or new architectures. Circuit designers will find the basic theory to understand the use of compact models to validate circuits against process variations and to evaluate the impact of parameter variations on circuit performances. Floating Gate Devices: Operation and Compact Modeling is meant to be a basic tool for designing the next generation of memory devices based on FG technologies Computer Engineering Circuits and Systems Electrical Engineering Processor Architectures Computer engineering Electronic circuits Electrical engineering Microprocessors Flash-Speicher (DE-588)4518714-9 gnd rswk-swf Floating-Gate-Struktur (DE-588)4325978-9 gnd rswk-swf Floating-Gate-Struktur (DE-588)4325978-9 s Flash-Speicher (DE-588)4518714-9 s DE-604 Larcher, Luca aut Marmiroli, Andrea aut Erscheint auch als Druck-Ausgabe 9781441954268 Erscheint auch als Druck-Ausgabe 9781402077319 Erscheint auch als Druck-Ausgabe 9781475784701 https://doi.org/10.1007/b105299 Verlag URL des Eerstveröffentlichers Volltext |
spellingShingle | Pavan, Paolo Larcher, Luca Marmiroli, Andrea Floating Gate Devices: Operation and Compact Modeling Computer Engineering Circuits and Systems Electrical Engineering Processor Architectures Computer engineering Electronic circuits Electrical engineering Microprocessors Flash-Speicher (DE-588)4518714-9 gnd Floating-Gate-Struktur (DE-588)4325978-9 gnd |
subject_GND | (DE-588)4518714-9 (DE-588)4325978-9 |
title | Floating Gate Devices: Operation and Compact Modeling |
title_auth | Floating Gate Devices: Operation and Compact Modeling |
title_exact_search | Floating Gate Devices: Operation and Compact Modeling |
title_exact_search_txtP | Floating Gate Devices: Operation and Compact Modeling |
title_full | Floating Gate Devices: Operation and Compact Modeling by Paolo Pavan, Luca Larcher, Andrea Marmiroli |
title_fullStr | Floating Gate Devices: Operation and Compact Modeling by Paolo Pavan, Luca Larcher, Andrea Marmiroli |
title_full_unstemmed | Floating Gate Devices: Operation and Compact Modeling by Paolo Pavan, Luca Larcher, Andrea Marmiroli |
title_short | Floating Gate Devices: Operation and Compact Modeling |
title_sort | floating gate devices operation and compact modeling |
topic | Computer Engineering Circuits and Systems Electrical Engineering Processor Architectures Computer engineering Electronic circuits Electrical engineering Microprocessors Flash-Speicher (DE-588)4518714-9 gnd Floating-Gate-Struktur (DE-588)4325978-9 gnd |
topic_facet | Computer Engineering Circuits and Systems Electrical Engineering Processor Architectures Computer engineering Electronic circuits Electrical engineering Microprocessors Flash-Speicher Floating-Gate-Struktur |
url | https://doi.org/10.1007/b105299 |
work_keys_str_mv | AT pavanpaolo floatinggatedevicesoperationandcompactmodeling AT larcherluca floatinggatedevicesoperationandcompactmodeling AT marmiroliandrea floatinggatedevicesoperationandcompactmodeling |