Introduction to Logic Circuits & Logic Design with Verilog:
Saved in:
| Main Author: | |
|---|---|
| Format: | Book |
| Language: | English |
| Published: |
Cham
Springer
2019
|
| Edition: | 2nd ed. |
| Subjects: | |
| Physical Description: | XVI, 485 Seiten |
| ISBN: | 9783030136079 |
Staff View
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| 245 | 1 | 0 | |a Introduction to Logic Circuits & Logic Design with Verilog |c Brock J. LaMeres |
| 250 | |a 2nd ed. | ||
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Record in the Search Index
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| author | LaMeres, Brock J. |
| author_GND | (DE-588)1116351587 |
| author_facet | LaMeres, Brock J. |
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| author_sort | LaMeres, Brock J. |
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| building | Verbundindex |
| bvnumber | BV046939630 |
| classification_rvk | ZN 5400 ZN 4904 |
| ctrlnum | (OCoLC)1229087163 (DE-599)BVBBV046939630 |
| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| discipline_str_mv | Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | 2nd ed. |
| format | Book |
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| id | DE-604.BV046939630 |
| illustrated | Not Illustrated |
| index_date | 2024-07-03T15:37:40Z |
| indexdate | 2024-07-10T08:58:03Z |
| institution | BVB |
| isbn | 9783030136079 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-032348377 |
| oclc_num | 1229087163 |
| open_access_boolean | |
| owner | DE-83 DE-1043 |
| owner_facet | DE-83 DE-1043 |
| physical | XVI, 485 Seiten |
| publishDate | 2019 |
| publishDateSearch | 2019 |
| publishDateSort | 2019 |
| publisher | Springer |
| record_format | marc |
| spelling | LaMeres, Brock J. Verfasser (DE-588)1116351587 aut Introduction to Logic Circuits & Logic Design with Verilog Brock J. LaMeres 2nd ed. Cham Springer 2019 XVI, 485 Seiten txt rdacontent n rdamedia nc rdacarrier Circuits and Systems Processor Architectures Logic Design Systems engineering Computer science Logic design Integrierte Schaltung (DE-588)4027242-4 gnd rswk-swf Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf VERILOG (DE-588)4268385-3 gnd rswk-swf Logische Schaltung (DE-588)4131023-8 gnd rswk-swf Schaltungsentwurf (DE-588)4179389-4 s Logische Schaltung (DE-588)4131023-8 s Integrierte Schaltung (DE-588)4027242-4 s VERILOG (DE-588)4268385-3 s DE-604 Erscheint auch als Online-Ausgabe 978-3-030-13605-5 |
| spellingShingle | LaMeres, Brock J. Introduction to Logic Circuits & Logic Design with Verilog Circuits and Systems Processor Architectures Logic Design Systems engineering Computer science Logic design Integrierte Schaltung (DE-588)4027242-4 gnd Schaltungsentwurf (DE-588)4179389-4 gnd VERILOG (DE-588)4268385-3 gnd Logische Schaltung (DE-588)4131023-8 gnd |
| subject_GND | (DE-588)4027242-4 (DE-588)4179389-4 (DE-588)4268385-3 (DE-588)4131023-8 |
| title | Introduction to Logic Circuits & Logic Design with Verilog |
| title_auth | Introduction to Logic Circuits & Logic Design with Verilog |
| title_exact_search | Introduction to Logic Circuits & Logic Design with Verilog |
| title_exact_search_txtP | Introduction to Logic Circuits & Logic Design with Verilog |
| title_full | Introduction to Logic Circuits & Logic Design with Verilog Brock J. LaMeres |
| title_fullStr | Introduction to Logic Circuits & Logic Design with Verilog Brock J. LaMeres |
| title_full_unstemmed | Introduction to Logic Circuits & Logic Design with Verilog Brock J. LaMeres |
| title_short | Introduction to Logic Circuits & Logic Design with Verilog |
| title_sort | introduction to logic circuits logic design with verilog |
| topic | Circuits and Systems Processor Architectures Logic Design Systems engineering Computer science Logic design Integrierte Schaltung (DE-588)4027242-4 gnd Schaltungsentwurf (DE-588)4179389-4 gnd VERILOG (DE-588)4268385-3 gnd Logische Schaltung (DE-588)4131023-8 gnd |
| topic_facet | Circuits and Systems Processor Architectures Logic Design Systems engineering Computer science Logic design Integrierte Schaltung Schaltungsentwurf VERILOG Logische Schaltung |
| work_keys_str_mv | AT lameresbrockj introductiontologiccircuitslogicdesignwithverilog |