SystemVerilog for Hardware Description: RTL Design and Verification
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Singapore
Springer Singapore
2020
Singapore Springer |
| Ausgabe: | 1st ed. 2020 |
| Schlagworte: | |
| Online-Zugang: | BTU01 FAB01 FAW01 FHA01 FHD01 FHI01 FHM01 FHN01 FHR01 FKE01 FLA01 FRO01 FWS01 FWS02 HTW01 TUM01 UBY01 Volltext |
| Beschreibung: | 1 Online-Ressource (XXI, 252 p. 104 illus., 95 illus. in color) |
| ISBN: | 9789811544057 |
| DOI: | 10.1007/978-981-15-4405-7 |
Internformat
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Datensatz im Suchindex
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| author | Taraate, Vaibbhav |
| author_facet | Taraate, Vaibbhav |
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| author_sort | Taraate, Vaibbhav |
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| bvnumber | BV046791640 |
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| collection | ZDB-2-ENG |
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| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik Maschinenbau |
| discipline_str_mv | Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik Maschinenbau |
| doi_str_mv | 10.1007/978-981-15-4405-7 |
| edition | 1st ed. 2020 |
| format | Electronic eBook |
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| id | DE-604.BV046791640 |
| illustrated | Not Illustrated |
| index_date | 2024-07-03T14:53:13Z |
| indexdate | 2024-08-01T15:24:58Z |
| institution | BVB |
| isbn | 9789811544057 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-032200568 |
| oclc_num | 1197107446 |
| open_access_boolean | |
| owner | DE-860 DE-91 DE-BY-TUM DE-1046 DE-1043 DE-Aug4 DE-898 DE-BY-UBR DE-861 DE-523 DE-859 DE-863 DE-BY-FWS DE-1050 DE-862 DE-BY-FWS DE-92 DE-573 DE-M347 DE-706 DE-634 |
| owner_facet | DE-860 DE-91 DE-BY-TUM DE-1046 DE-1043 DE-Aug4 DE-898 DE-BY-UBR DE-861 DE-523 DE-859 DE-863 DE-BY-FWS DE-1050 DE-862 DE-BY-FWS DE-92 DE-573 DE-M347 DE-706 DE-634 |
| physical | 1 Online-Ressource (XXI, 252 p. 104 illus., 95 illus. in color) |
| psigel | ZDB-2-ENG ZDB-2-ENG_2020_Fremddaten |
| publishDate | 2020 |
| publishDateSearch | 2020 |
| publishDateSort | 2020 |
| publisher | Springer Singapore Springer |
| record_format | marc |
| spellingShingle | Taraate, Vaibbhav SystemVerilog for Hardware Description RTL Design and Verification Circuits and Systems Control Structures and Microprogramming Electronics and Microelectronics, Instrumentation Electronic Circuits and Devices Electronic circuits Microprogramming Electronics Microelectronics Hardwarebeschreibungssprache (DE-588)4159102-1 gnd VERILOG (DE-588)4268385-3 gnd |
| subject_GND | (DE-588)4159102-1 (DE-588)4268385-3 |
| title | SystemVerilog for Hardware Description RTL Design and Verification |
| title_auth | SystemVerilog for Hardware Description RTL Design and Verification |
| title_exact_search | SystemVerilog for Hardware Description RTL Design and Verification |
| title_exact_search_txtP | SystemVerilog for Hardware Description RTL Design and Verification |
| title_full | SystemVerilog for Hardware Description RTL Design and Verification by Vaibbhav Taraate |
| title_fullStr | SystemVerilog for Hardware Description RTL Design and Verification by Vaibbhav Taraate |
| title_full_unstemmed | SystemVerilog for Hardware Description RTL Design and Verification by Vaibbhav Taraate |
| title_short | SystemVerilog for Hardware Description |
| title_sort | systemverilog for hardware description rtl design and verification |
| title_sub | RTL Design and Verification |
| topic | Circuits and Systems Control Structures and Microprogramming Electronics and Microelectronics, Instrumentation Electronic Circuits and Devices Electronic circuits Microprogramming Electronics Microelectronics Hardwarebeschreibungssprache (DE-588)4159102-1 gnd VERILOG (DE-588)4268385-3 gnd |
| topic_facet | Circuits and Systems Control Structures and Microprogramming Electronics and Microelectronics, Instrumentation Electronic Circuits and Devices Electronic circuits Microprogramming Electronics Microelectronics Hardwarebeschreibungssprache VERILOG |
| url | https://doi.org/10.1007/978-981-15-4405-7 |
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