Low latency reconfiguration mechanism for fine-grained processor internal functional units:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
[USA]
IEEE
2019
|
| Schlagworte: | |
| Online-Zugang: | kostenfrei kostenfrei |
| Beschreibung: | Published in: 2019 IEEE Latin American Test Symposium (LATS) |
| Beschreibung: | 1 Online-Ressource (6 Seiten) Illustrationen |
Internformat
MARC
| LEADER | 00000nmm a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV046788593 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 006 | a |||| 10||| | ||
| 007 | cr|uuu---uuuuu | ||
| 008 | 200701s2019 |||| o||u| ||||||eng d | ||
| 024 | 7 | |a 10.1109/LATW.2019.8704560 |2 doi | |
| 024 | 7 | |a urn:nbn:de:kobv:co1-opus4-50497 |2 urn | |
| 035 | |a (OCoLC)1164638842 | ||
| 035 | |a (DE-599)BVBBV046788593 | ||
| 040 | |a DE-604 |b ger |e rda | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-634 | ||
| 100 | 1 | |a Segabinazzi Ferreira, Raphael |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Low latency reconfiguration mechanism for fine-grained processor internal functional units |c Raphael Segabinazzi Ferreira, Jörg Nolte |
| 264 | 1 | |a [USA] |b IEEE |c 2019 | |
| 300 | |a 1 Online-Ressource (6 Seiten) |b Illustrationen | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 500 | |a Published in: 2019 IEEE Latin American Test Symposium (LATS) | ||
| 650 | 0 | 7 | |a Mikroprozessor 14500 |0 (DE-588)4405181-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Latenzzeit |g Informatik |0 (DE-588)4504941-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Rekonfiguration |0 (DE-588)4306238-6 |2 gnd |9 rswk-swf |
| 655 | 7 | |0 (DE-588)1071861417 |a Konferenzschrift |2 gnd-content | |
| 689 | 0 | 0 | |a Latenzzeit |g Informatik |0 (DE-588)4504941-5 |D s |
| 689 | 0 | 1 | |a Mikroprozessor 14500 |0 (DE-588)4405181-5 |D s |
| 689 | 0 | 2 | |a Rekonfiguration |0 (DE-588)4306238-6 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Nolte, Jörg |d 1962- |e Verfasser |0 (DE-588)172719569 |4 aut | |
| 856 | 4 | 1 | |u https://opus4.kobv.de/opus4-btu/frontdoor/index/index/docId/5049 |x Verlag |z kostenfrei |3 Volltext |
| 856 | 4 | 1 | |u https://nbn-resolving.org/urn:nbn:de:kobv:co1-opus4-50497 |x Resolving |z kostenfrei |3 Volltext |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-032197588 | ||
Datensatz im Suchindex
| _version_ | 1804181576207040512 |
|---|---|
| adam_txt | |
| any_adam_object | |
| any_adam_object_boolean | |
| author | Segabinazzi Ferreira, Raphael Nolte, Jörg 1962- |
| author_GND | (DE-588)172719569 |
| author_facet | Segabinazzi Ferreira, Raphael Nolte, Jörg 1962- |
| author_role | aut aut |
| author_sort | Segabinazzi Ferreira, Raphael |
| author_variant | f r s fr frs j n jn |
| building | Verbundindex |
| bvnumber | BV046788593 |
| ctrlnum | (OCoLC)1164638842 (DE-599)BVBBV046788593 |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01749nmm a2200421 c 4500</leader><controlfield tag="001">BV046788593</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="006">a |||| 10||| </controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">200701s2019 |||| o||u| ||||||eng d</controlfield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1109/LATW.2019.8704560</subfield><subfield code="2">doi</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">urn:nbn:de:kobv:co1-opus4-50497</subfield><subfield code="2">urn</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)1164638842</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV046788593</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rda</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-634</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Segabinazzi Ferreira, Raphael</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Low latency reconfiguration mechanism for fine-grained processor internal functional units</subfield><subfield code="c">Raphael Segabinazzi Ferreira, Jörg Nolte</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">[USA]</subfield><subfield code="b">IEEE</subfield><subfield code="c">2019</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (6 Seiten)</subfield><subfield code="b">Illustrationen</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Published in: 2019 IEEE Latin American Test Symposium (LATS)</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Mikroprozessor 14500</subfield><subfield code="0">(DE-588)4405181-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Latenzzeit</subfield><subfield code="g">Informatik</subfield><subfield code="0">(DE-588)4504941-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Rekonfiguration</subfield><subfield code="0">(DE-588)4306238-6</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="0">(DE-588)1071861417</subfield><subfield code="a">Konferenzschrift</subfield><subfield code="2">gnd-content</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Latenzzeit</subfield><subfield code="g">Informatik</subfield><subfield code="0">(DE-588)4504941-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Mikroprozessor 14500</subfield><subfield code="0">(DE-588)4405181-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">Rekonfiguration</subfield><subfield code="0">(DE-588)4306238-6</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Nolte, Jörg</subfield><subfield code="d">1962-</subfield><subfield code="e">Verfasser</subfield><subfield code="0">(DE-588)172719569</subfield><subfield code="4">aut</subfield></datafield><datafield tag="856" ind1="4" ind2="1"><subfield code="u">https://opus4.kobv.de/opus4-btu/frontdoor/index/index/docId/5049</subfield><subfield code="x">Verlag</subfield><subfield code="z">kostenfrei</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="856" ind1="4" ind2="1"><subfield code="u">https://nbn-resolving.org/urn:nbn:de:kobv:co1-opus4-50497</subfield><subfield code="x">Resolving</subfield><subfield code="z">kostenfrei</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-032197588</subfield></datafield></record></collection> |
| genre | (DE-588)1071861417 Konferenzschrift gnd-content |
| genre_facet | Konferenzschrift |
| id | DE-604.BV046788593 |
| illustrated | Not Illustrated |
| index_date | 2024-07-03T14:52:20Z |
| indexdate | 2024-07-10T08:53:51Z |
| institution | BVB |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-032197588 |
| oclc_num | 1164638842 |
| open_access_boolean | 1 |
| owner | DE-634 |
| owner_facet | DE-634 |
| physical | 1 Online-Ressource (6 Seiten) Illustrationen |
| publishDate | 2019 |
| publishDateSearch | 2019 |
| publishDateSort | 2019 |
| publisher | IEEE |
| record_format | marc |
| spelling | Segabinazzi Ferreira, Raphael Verfasser aut Low latency reconfiguration mechanism for fine-grained processor internal functional units Raphael Segabinazzi Ferreira, Jörg Nolte [USA] IEEE 2019 1 Online-Ressource (6 Seiten) Illustrationen txt rdacontent c rdamedia cr rdacarrier Published in: 2019 IEEE Latin American Test Symposium (LATS) Mikroprozessor 14500 (DE-588)4405181-5 gnd rswk-swf Latenzzeit Informatik (DE-588)4504941-5 gnd rswk-swf Rekonfiguration (DE-588)4306238-6 gnd rswk-swf (DE-588)1071861417 Konferenzschrift gnd-content Latenzzeit Informatik (DE-588)4504941-5 s Mikroprozessor 14500 (DE-588)4405181-5 s Rekonfiguration (DE-588)4306238-6 s DE-604 Nolte, Jörg 1962- Verfasser (DE-588)172719569 aut https://opus4.kobv.de/opus4-btu/frontdoor/index/index/docId/5049 Verlag kostenfrei Volltext https://nbn-resolving.org/urn:nbn:de:kobv:co1-opus4-50497 Resolving kostenfrei Volltext |
| spellingShingle | Segabinazzi Ferreira, Raphael Nolte, Jörg 1962- Low latency reconfiguration mechanism for fine-grained processor internal functional units Mikroprozessor 14500 (DE-588)4405181-5 gnd Latenzzeit Informatik (DE-588)4504941-5 gnd Rekonfiguration (DE-588)4306238-6 gnd |
| subject_GND | (DE-588)4405181-5 (DE-588)4504941-5 (DE-588)4306238-6 (DE-588)1071861417 |
| title | Low latency reconfiguration mechanism for fine-grained processor internal functional units |
| title_auth | Low latency reconfiguration mechanism for fine-grained processor internal functional units |
| title_exact_search | Low latency reconfiguration mechanism for fine-grained processor internal functional units |
| title_exact_search_txtP | Low latency reconfiguration mechanism for fine-grained processor internal functional units |
| title_full | Low latency reconfiguration mechanism for fine-grained processor internal functional units Raphael Segabinazzi Ferreira, Jörg Nolte |
| title_fullStr | Low latency reconfiguration mechanism for fine-grained processor internal functional units Raphael Segabinazzi Ferreira, Jörg Nolte |
| title_full_unstemmed | Low latency reconfiguration mechanism for fine-grained processor internal functional units Raphael Segabinazzi Ferreira, Jörg Nolte |
| title_short | Low latency reconfiguration mechanism for fine-grained processor internal functional units |
| title_sort | low latency reconfiguration mechanism for fine grained processor internal functional units |
| topic | Mikroprozessor 14500 (DE-588)4405181-5 gnd Latenzzeit Informatik (DE-588)4504941-5 gnd Rekonfiguration (DE-588)4306238-6 gnd |
| topic_facet | Mikroprozessor 14500 Latenzzeit Informatik Rekonfiguration Konferenzschrift |
| url | https://opus4.kobv.de/opus4-btu/frontdoor/index/index/docId/5049 https://nbn-resolving.org/urn:nbn:de:kobv:co1-opus4-50497 |
| work_keys_str_mv | AT segabinazziferreiraraphael lowlatencyreconfigurationmechanismforfinegrainedprocessorinternalfunctionalunits AT noltejorg lowlatencyreconfigurationmechanismforfinegrainedprocessorinternalfunctionalunits |