Transaction processing on modern hardware:
The last decade has brought groundbreaking developments in transaction processing. This resurgence of an otherwise mature research area has spurred from the diminishing cost per GB of DRAM that allows many transaction processing workloads to be entirely memory-resident. This shift demanded a pause t...
Gespeichert in:
| Hauptverfasser: | , |
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| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
[San Rafael, California]
Morgan & Claypool Publishers
[2019]
|
| Schriftenreihe: | Synthesis lectures on data management
#58 |
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Zusammenfassung: | The last decade has brought groundbreaking developments in transaction processing. This resurgence of an otherwise mature research area has spurred from the diminishing cost per GB of DRAM that allows many transaction processing workloads to be entirely memory-resident. This shift demanded a pause to fundamentally rethink the architecture of database systems. The data storage lexicon has now expanded beyond spinning disks and RAID levels to include the cache hierarchy, memory consistency models, cache coherence and write invalidation costs, NUMA regions, and coherence domains. New memory technologies promise fast non-volatile storage and expose unchartered trade-offs for transactional durability, such as exploiting byte-addressable hot and cold storage through persistent programming that promotes simpler recovery protocols. In the meantime, the plateauing single-threaded processor performance has brought massive concurrency within a single node, first in the form of multi-core, and now with many-core and heterogeneous processors. The exciting possibility to reshape the storage, transaction, logging, and recovery layers of next-generation systems on emerging hardware have prompted the database research community to vigorously debate the trade-offs between specialized kernels that narrowly focus on transaction processing performance vs. designs that permit transactionally consistent data accesses from decision support and analytical workloads. In this book, we aim to classify and distill the new body of work on transaction processing that has surfaced in the last decade to navigate researchers and practitioners through this intricate research subject |
| Beschreibung: | Part of: Synthesis digital library of engineering and computer science Title from PDF title page (viewed on April 2, 2019) |
| Beschreibung: | 1 Online-Resource (xv, 112 Seiten) Illustrationen |
| ISBN: | 9781681735009 |
| DOI: | 10.2200/S00896ED1V01Y201901DTM058 |
Internformat
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Datensatz im Suchindex
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| indexdate | 2024-07-10T08:44:19Z |
| institution | BVB |
| isbn | 9781681735009 |
| language | English |
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| series | Synthesis lectures on data management |
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| spelling | Sadoghi, Mohammad Verfasser aut Transaction processing on modern hardware Mohammad Sadoghi, Spyros Blanas [San Rafael, California] Morgan & Claypool Publishers [2019] © 2019 1 Online-Resource (xv, 112 Seiten) Illustrationen txt rdacontent c rdamedia cr rdacarrier Synthesis lectures on data management #58 Part of: Synthesis digital library of engineering and computer science Title from PDF title page (viewed on April 2, 2019) The last decade has brought groundbreaking developments in transaction processing. This resurgence of an otherwise mature research area has spurred from the diminishing cost per GB of DRAM that allows many transaction processing workloads to be entirely memory-resident. This shift demanded a pause to fundamentally rethink the architecture of database systems. The data storage lexicon has now expanded beyond spinning disks and RAID levels to include the cache hierarchy, memory consistency models, cache coherence and write invalidation costs, NUMA regions, and coherence domains. New memory technologies promise fast non-volatile storage and expose unchartered trade-offs for transactional durability, such as exploiting byte-addressable hot and cold storage through persistent programming that promotes simpler recovery protocols. In the meantime, the plateauing single-threaded processor performance has brought massive concurrency within a single node, first in the form of multi-core, and now with many-core and heterogeneous processors. The exciting possibility to reshape the storage, transaction, logging, and recovery layers of next-generation systems on emerging hardware have prompted the database research community to vigorously debate the trade-offs between specialized kernels that narrowly focus on transaction processing performance vs. designs that permit transactionally consistent data accesses from decision support and analytical workloads. In this book, we aim to classify and distill the new body of work on transaction processing that has surfaced in the last decade to navigate researchers and practitioners through this intricate research subject Transaction systems (Computer systems) Mehrkernprozessor (DE-588)7598578-0 gnd rswk-swf Speicher Informatik (DE-588)4077653-0 gnd rswk-swf Transaktionsverarbeitung (DE-588)4246591-6 gnd rswk-swf Datenbanksystem (DE-588)4113276-2 gnd rswk-swf Hardware (DE-588)4023422-8 gnd rswk-swf Datenbanksystem (DE-588)4113276-2 s Transaktionsverarbeitung (DE-588)4246591-6 s Hardware (DE-588)4023422-8 s Speicher Informatik (DE-588)4077653-0 s Mehrkernprozessor (DE-588)7598578-0 s DE-604 Blanas, Spyros Verfasser aut Erscheint auch als Druck-Ausgabe, hardcover 978-1-68173-501-6 Erscheint auch als Druck-Ausgabe, paperback 978-1-68173-499-6 Synthesis lectures on data management #58 (DE-604)BV036731811 58 https://doi.org/10.2200/S00896ED1V01Y201901DTM058 Verlag URL des Erstveröffentlichers Volltext |
| spellingShingle | Sadoghi, Mohammad Blanas, Spyros Transaction processing on modern hardware Synthesis lectures on data management Transaction systems (Computer systems) Mehrkernprozessor (DE-588)7598578-0 gnd Speicher Informatik (DE-588)4077653-0 gnd Transaktionsverarbeitung (DE-588)4246591-6 gnd Datenbanksystem (DE-588)4113276-2 gnd Hardware (DE-588)4023422-8 gnd |
| subject_GND | (DE-588)7598578-0 (DE-588)4077653-0 (DE-588)4246591-6 (DE-588)4113276-2 (DE-588)4023422-8 |
| title | Transaction processing on modern hardware |
| title_auth | Transaction processing on modern hardware |
| title_exact_search | Transaction processing on modern hardware |
| title_full | Transaction processing on modern hardware Mohammad Sadoghi, Spyros Blanas |
| title_fullStr | Transaction processing on modern hardware Mohammad Sadoghi, Spyros Blanas |
| title_full_unstemmed | Transaction processing on modern hardware Mohammad Sadoghi, Spyros Blanas |
| title_short | Transaction processing on modern hardware |
| title_sort | transaction processing on modern hardware |
| topic | Transaction systems (Computer systems) Mehrkernprozessor (DE-588)7598578-0 gnd Speicher Informatik (DE-588)4077653-0 gnd Transaktionsverarbeitung (DE-588)4246591-6 gnd Datenbanksystem (DE-588)4113276-2 gnd Hardware (DE-588)4023422-8 gnd |
| topic_facet | Transaction systems (Computer systems) Mehrkernprozessor Speicher Informatik Transaktionsverarbeitung Datenbanksystem Hardware |
| url | https://doi.org/10.2200/S00896ED1V01Y201901DTM058 |
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