Routing in the third dimension: from VLSI chips to MCMs
This key text addresses the complex computer chips of tomorrow which will consist of several layers of metal interconnect, making the interconnect within a chip or a multichip module a three dimensional problem. You'll find an insightful approach to the algorithmic, cell design issues in chip a...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Piscataway, New Jersey
IEEE Press
c1995
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| Schlagworte: | |
| Online-Zugang: | FHI01 FHN01 Volltext |
| Zusammenfassung: | This key text addresses the complex computer chips of tomorrow which will consist of several layers of metal interconnect, making the interconnect within a chip or a multichip module a three dimensional problem. You'll find an insightful approach to the algorithmic, cell design issues in chip and MCM routing with an emphasis on techniques for eliminating routing area |
| Beschreibung: | Description based on PDF viewed 12/21/2015 |
| Beschreibung: | 1 Online-Resource (xviii, 358 pages) illustrations |
| ISBN: | 9780470546376 |
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| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Computer-aided design | |
| 650 | 4 | |a Multichip modules (Microelectronics) |x Computer-aided design | |
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Datensatz im Suchindex
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| author | Sherwani, N. A. , (Naveed A.) |
| author_facet | Sherwani, N. A. , (Naveed A.) |
| author_role | aut |
| author_sort | Sherwani, N. A. , (Naveed A.) |
| author_variant | n a n a s nana nanas |
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| bvnumber | BV046418239 |
| collection | ZDB-35-WEL |
| ctrlnum | (ZDB-35-WEL)5263943 (OCoLC)1141149500 (DE-599)BVBBV046418239 |
| dewey-full | 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
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| id | DE-604.BV046418239 |
| illustrated | Illustrated |
| indexdate | 2024-07-10T08:44:05Z |
| institution | BVB |
| isbn | 9780470546376 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-031830711 |
| oclc_num | 1141149500 |
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| physical | 1 Online-Resource (xviii, 358 pages) illustrations |
| psigel | ZDB-35-WEL |
| publishDate | 1995 |
| publishDateSearch | 1995 |
| publishDateSort | 1995 |
| publisher | IEEE Press |
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| spelling | Sherwani, N. A. , (Naveed A.) Verfasser aut Routing in the third dimension from VLSI chips to MCMs Naveed A. Sherwani, Siddharth Bhingarde, Anand Panyam Piscataway, New Jersey IEEE Press c1995 1 Online-Resource (xviii, 358 pages) illustrations txt rdacontent c rdamedia cr rdacarrier Description based on PDF viewed 12/21/2015 This key text addresses the complex computer chips of tomorrow which will consist of several layers of metal interconnect, making the interconnect within a chip or a multichip module a three dimensional problem. You'll find an insightful approach to the algorithmic, cell design issues in chip and MCM routing with an emphasis on techniques for eliminating routing area Integrated circuits Very large scale integration Computer-aided design Multichip modules (Microelectronics) Computer-aided design Bhingarde, Siddharth Sonstige oth Panyam, Anand Sonstige oth Erscheint auch als Druck-Ausgabe 9780780310896 https://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=5263943 Aggregator URL des Erstveröffentlichers Volltext |
| spellingShingle | Sherwani, N. A. , (Naveed A.) Routing in the third dimension from VLSI chips to MCMs Integrated circuits Very large scale integration Computer-aided design Multichip modules (Microelectronics) Computer-aided design |
| title | Routing in the third dimension from VLSI chips to MCMs |
| title_auth | Routing in the third dimension from VLSI chips to MCMs |
| title_exact_search | Routing in the third dimension from VLSI chips to MCMs |
| title_full | Routing in the third dimension from VLSI chips to MCMs Naveed A. Sherwani, Siddharth Bhingarde, Anand Panyam |
| title_fullStr | Routing in the third dimension from VLSI chips to MCMs Naveed A. Sherwani, Siddharth Bhingarde, Anand Panyam |
| title_full_unstemmed | Routing in the third dimension from VLSI chips to MCMs Naveed A. Sherwani, Siddharth Bhingarde, Anand Panyam |
| title_short | Routing in the third dimension |
| title_sort | routing in the third dimension from vlsi chips to mcms |
| title_sub | from VLSI chips to MCMs |
| topic | Integrated circuits Very large scale integration Computer-aided design Multichip modules (Microelectronics) Computer-aided design |
| topic_facet | Integrated circuits Very large scale integration Computer-aided design Multichip modules (Microelectronics) Computer-aided design |
| url | https://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=5263943 |
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