Grundlagen der Technischen Informatik:
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Buch |
Sprache: | German |
Veröffentlicht: |
München
Hanser
[2020]
|
Ausgabe: | 6., aktualisierte Auflage |
Schlagworte: | |
Online-Zugang: | Inhaltsverzeichnis |
Beschreibung: | 447 Seiten Illustrationen, Diagramme 25 cm |
ISBN: | 9783446463141 3446463143 |
Internformat
MARC
LEADER | 00000nam a22000008c 4500 | ||
---|---|---|---|
001 | BV046347753 | ||
003 | DE-604 | ||
005 | 20200515 | ||
007 | t | ||
008 | 200122s2020 a||| |||| 00||| ger d | ||
015 | |a 19,N49 |2 dnb | ||
016 | 7 | |a 1200495543 |2 DE-101 | |
020 | |a 9783446463141 |c : circa EUR 39.99 (DE), circa EUR 41.20 (AT) |9 978-3-446-46314-1 | ||
020 | |a 3446463143 |9 3-446-46314-3 | ||
024 | 3 | |a 9783446463141 | |
035 | |a (OCoLC)1129464987 | ||
035 | |a (DE-599)DNB1200495543 | ||
040 | |a DE-604 |b ger |e rda | ||
041 | 0 | |a ger | |
049 | |a DE-91G |a DE-12 |a DE-1050 |a DE-634 |a DE-92 |a DE-1043 |a DE-1051 |a DE-1049 |a DE-Aug4 |a DE-210 |a DE-859 |a DE-523 |a DE-29T |a DE-20 |a DE-83 |a DE-19 |a DE-526 |a DE-355 | ||
082 | 0 | |a 004 |2 23 | |
084 | |a ST 150 |0 (DE-625)143594: |2 rvk | ||
084 | |a DAT 100f |2 stub | ||
084 | |a 004 |2 sdnb | ||
100 | 1 | |a Hoffmann, Dirk W. |d 1972- |e Verfasser |0 (DE-588)122854802 |4 aut | |
245 | 1 | 0 | |a Grundlagen der Technischen Informatik |c Dirk W. Hoffmann |
250 | |a 6., aktualisierte Auflage | ||
264 | 1 | |a München |b Hanser |c [2020] | |
264 | 4 | |c © 2020 | |
300 | |a 447 Seiten |b Illustrationen, Diagramme |c 25 cm | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
650 | 0 | 7 | |a Technische Informatik |0 (DE-588)4196734-3 |2 gnd |9 rswk-swf |
653 | |a Anwendungsorientiert | ||
653 | |a Bachelorstudium | ||
653 | |a Boolesche Algebra | ||
653 | |a Digitaltechnik | ||
653 | |a Grundlagenbuch | ||
653 | |a Grundlagenwissen | ||
653 | |a Grundstudium | ||
653 | |a Halbleitertechnik | ||
653 | |a Hardware | ||
653 | |a Informatik | ||
653 | |a Lehrbuch | ||
653 | |a Mikroprozessortechnik | ||
653 | |a Rechnerentwurf | ||
653 | |a Rechnerorganisation | ||
653 | |a Rechnerstrukturen | ||
653 | |a Schaltnetze | ||
653 | |a Schaltwerke | ||
653 | |a Selbststudium | ||
653 | |a Speicherelemente | ||
653 | |a Studienbuch | ||
653 | |a Studienhilfe | ||
653 | |a Zahlendarstellung | ||
653 | |a FBITTINF: Technische Informatik | ||
653 | |a FBLEHR: Lehrbuch | ||
653 | |a INF2020 | ||
655 | 7 | |0 (DE-588)4123623-3 |a Lehrbuch |2 gnd-content | |
689 | 0 | 0 | |a Technische Informatik |0 (DE-588)4196734-3 |D s |
689 | 0 | |5 DE-604 | |
776 | 0 | 8 | |i Erscheint auch als |n Online-Ausgabe |z 978-3-446-46360-8 |
856 | 4 | 2 | |m DNB Datenaustausch |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=031724316&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |3 Inhaltsverzeichnis |
999 | |a oai:aleph.bib-bvb.de:BVB01-031724316 |
Datensatz im Suchindex
_version_ | 1804180851557138432 |
---|---|
adam_text | INHALTSVERZEICHNIS
1
EINFUEHRUNG
11
1.1
WAS
IST
TECHNISCHE
INFORMATIK?
.................................................................................................................
11
1.2
VOM
ABAKUS
ZUM
SUPERCOMPUTER
..............................................................................................................
13
1.3
WOHIN
GEHT
DIE
REISE?
................................................................................................................................
30
2
HALBLEITERTECHNIK
33
2.1
HALBLEITER
...................................................................................................................................................
34
2.1.1
ATOMMODELL
VON
BOHR
.................................................................................................................
34
2.1.2
REINE
HALBLEITER
..........................................................................................................................
37
2.1.3
DOTIERTE
HALBLEITER
.......................................................................................................................
39
2.2
INTEGRIERTE
SCHALTELEMENTE
..........................................................................................................................
41
2.2.1
HALBLEITERDIODEN
..........................................................................................................................
41
2.2.2
BIPOLARTRANSISTOREN
.......................................................................................................................
42
2.2.3
FELDEFFEKTTRANSISTOREN
.................................................................................................................
46
2.3
CHIP-FERTIGUNG
..........................................................................................................................................
51
2.3.1
PRODUKTION
INTEGRIERTER
SCHALTKREISE
...........................................................................................
51
2.3.2
INTEGRATIONSDICHTE
.......................................................................................................................
57
2.4
UEBUNGSAUFGABEN
.........................................................................................................................................
58
3
ZAHLENDARSTELLUNG
UND
CODES
59
3.1
ZAHLENSYSTEME
.............................................................................................................................................
60
3.2
RECHNERINTEME
ZAHLENFORMATE
................................................................................................................
67
3.2.1
DARSTELLUNG
NATUERLICHER
ZAHLEN
.................................................................................................
67
3.2.2
DARSTELLUNG
RATIONALER
ZAHLEN
....................................................................................................
73
3.3
ZAHLENCODES
................................................................................................................................................
80
3.3.1
TETRADEN-CODES
..........................................................................................................................
80
3.3.2
FEHLERERKENNENDE
CODES
.............................................................................................................
84
3.4
UEBUNGSAUFGABEN
...........................................................
86
4
BOOLESCHE
ALGEBRA
89
4.1
AXIOMATISIERUNG
NACH
HUNTINGTON
..........................................................................................................
90
4.1.1
MENGENALGEBRA
..........................................................................................................................
91
4.1.2
SCHALTALGEBRA
................................................................................................................................
93
4.2
BOOLESCHE
AUSDRUECKE
UND
AUSSAGEN
.......................................................................................................
95
4.2.1
ABGELEITETE
OPERATOREN
.............................................................................................................
97
4.2.2
ERFUELLBARKEIT
UND
AEQUIVALENZ
.......................................................................................................
100
4.2.3
STRUKTURELLE
INDUKTION
...................................................................................................................
102
4.2.4
DUALITAETSPRINZIP
.............................................................................................................................
105
8
INHALTSVERZEICHNIS
4.3
RECHNEN
IN
BOOLESCHEN
ALGEBREN
.................................................................................................................
109
4.3.1
ABGELEITETE
UMFORMUNGSREGELN
....................................................................................................
109
4.3.2
VEREINFACHUNG
BOOLESCHER
AUSDRUECKE
...........................................................................................
111
4.3.3
VOLLSTAENDIGE
OPERATORENSYSTEME
....................................................................................................
117
4.4
NORMALFORMDARSTELLUNGEN
..............................................................................................................................
119
4.4.1
KONJUNKTIVE
UND
DISJUNKTIVE
NORMALFORM
.....................................................................................
119
4.4.2
REED-MULLER-NORMALFORM
..............................................................................................................
122
4.4.3
BINAERE
ENTSCHEIDUNGSDIAGRAMME
.....................................
125
4.5
UEBUNGSAUFGABEN
.............................................................................................................................................
133
5
SCHALTNETZE
139
5.1
GRUNDLAGEN
DER
DIGITALTECHNIK
....................................................................................................................
140
5.1.1
SCHALTKREISFAMILIEN
.......................................................................................................................
140
5.1.2
MOS-SCHALTUNGSTECHNIK
.................................................................................................................
145
5.1.3
LASTFAKTOREN
....................................................................................................................................
155
5.2
SCHALTUNGSSYNTHESE
.......................................................................................................................................
156
5.2.1
ZWEISTUFIGE
SCHALTUNGSSYNTHESE
....................................................................................................
157
5.2.2
BDD-BASIERTE
SCHALTUNGSSYNTHESE
.................................................................................................
158
5.2.3
BDD-BASIERTE
SCHALTUNGSSYNTHESE
.................................................................................................
159
5.3
FORMELSYNTHESE
.............................................................................................................................................
161
5.3.1
FUNKTIONALE
FORMELSYNTHESE
...........................................................................................................
161
5.3.2
RELATIONALE
FORMELSYNTHESE
...........................................................................................................
163
5.3.3
DEFINITORISCHE
FORMELSYNTHESE
....................................................................................................
164
5.4
KOMPLEXITAETSANALYSE
.......................................................................................................................................
167
5.5
ZEITVERHALTEN
DIGITALER
SCHALTUNGEN
..............................................................................................................
169
5.5.1
SIGNALAUSBREITUNG
UND
-VERZOEGERUNG
...........................................................................................
169
5.5.2
STOERIMPULSE
....................................................................................................................................
171
5.6
UEBUNGSAUFGABEN
.............................................................................................................................................
175
6
MINIMIERUNG
181
6.1
MINIMIERUNGSZIELE
..........................................................................................................................................
182
6.2
KAMAUGH-VEITCH-DIAGRAMME
.......................................................................................................................
186
6.2.1
MINIMIERUNG
PARTIELL
DEFINIERTER
FUNKTIONEN
..............................................................................
190
6.2.2
KONSTRUKTION
HAZARD-FREIER
SCHALTUNGEN
.....................................................................................
194
6.2.3
MINIMIERUNG
MEHRSTELLIGER
FUNKTIONEN
........................................................................................
196
6.3
QUINE-MCCLUSKEY-VERFAHREN
.......................................................................................................................
197
6.4
UEBUNGSAUFGABEN
.............................................................................................................................................
201
7
STANDARDSCHALTNETZE
205
7.1
MOTIVATION
......................................................................................................................................................206
7.2
MULTIPLEXER
UND
DEMULTIPLEXER
...................................................................................................................206
7.3
KOMPARATOREN
................................................................................................................................................
213
7.4
PRAEFIX-LOGIK
...................................................................................................................................................
215
INHALTSVERZEICHNIS
9
7.5
ADDIERER
.........................................................................................................................................................
218
7.5.1
HALB-UND
VOLLADDIERER
...................................................................................................................
218
7.5.2
CARRY-RIPPLE-ADDIERER
...................................................................................................................
220
7.5.3
CARRY-LOOK-AHEAD-ADDIERER
..........................................................................................................
221
7.5.4
CONDITIONAL-SUM-ADDIERER
..........................................................................................................224
7.5.5
PRAEFIX-ADDIERER
.............................................................................................................................
227
7.5.6
CARRY-SAVE-ADDIERER
......................................................................................................................
229
7.6
INKREMENTIERER
...............................................................................................................................................
232
7.7
SUBTRAHIERER
...................................................................................................................................................
233
7.8
MULTIPLIZIERER
...............................................................................................................................................
234
7.8.1
MATRIXMULTIPLIZIERER
......................................................................................................................
235
7.8.2
CARRY-SAVE-MULTIPLIZIERER
.............................................................................................................
238
7.8.3
WALLACE-TREE-MULTIPLIZIERER
..........................................................................................................
241
7.8.4
DADDA-TREE-MULTIPLIZIERER
.............................................................................................................246
7.9
BARREL-SHIFTER
...............................................................................................................................................
249
7.10
ARITHMETISCH-LOGISCHE
EINHEIT
......................................................................................................................
251
7.11
PROGRAMMIERBARE
LOGIKBAUSTEINE
................................................................................................................
253
7.12
UEBUNGSAUFGABEN
............................................................................................................................................
256
8
SCHALTWERKE
265
8.1
DIGITALE
SPEICHERELEMENTE
.............................................................................................................................
266
8.1.1
ASYNCHRONE
SPEICHERELEMENTE
.......................................................................................................
267
8.1.2
TAKTZUSTANDSGESTEUERTE
SPEICHERELEMENTE
....................................................................................
271
8.1.3
TAKTFLANKENGESTEUERTE
SPEICHERELEMENTE
....................................................................................274
8.1.4
BEVORRECHTIGTE
EINGAENGE
................................................................................................................
281
8.1.5
CMOS-IMPLEMENTIERUNG
.............................................................................................................282
8.2
VOM
FLIPFLOP
ZUM
SCHALTWERK
......................................................................................................................
285
8.2.1
ENDLICHE
AUTOMATEN
......................................................................................................................
286
8.2.2
SCHALTWERKSYNTHESE
......................................................................................................................
289
8.3
UEBUNGSAUFGABEN
............................................................................................................................................
293
9
STANDARDSCHALTWERKE
299
9.1
REGISTER
.........................................................................................................................................................300
9.1.1
AUFFANGREGISTER
............................................................................................................................300
9.1.2
SCHIEBEREGISTER
................................................................................................................................
302
9.1.3
UNIVERSALREGISTER
............................................................................................................................
304
9.1.4
AKKUMULATOREN
............................................................................................................................
305
9.2
ZAEHLER
............................................................................................................................................................
308
9.2.1
SYNCHRONE
BINAERZAEHLER
...................................................................................................................
309
9.2.2
ASYNCHRONE
BINAERZAEHLER
................................................................................................................
313
9.2.3
MISCHZAEHLER
...................................................................................................................................
314
9.2.4
INSTRUKTIONSZAEHLER
.........................................................................................................................
316
10
INHALTSVERZEICHNIS
9.3
HAUPTSPEICHER
................................................................................................................................................
318
9.3.1
SRAM-SPEICHER
.............................................................................................................................
318
9.3.2
DRAM-SPEICHER
.............................................................................................................................320
9.3.3
FEHLERERKENNUNG
UND
-KORREKTUR
....................................................................................................
327
9.4
UEBUNGSAUFGABEN
.............................................................................................................................................330
10
REGISTER-TRANSFER-ENTWURF
335
10.1
ENTWURF
KOMPLEXER
SYSTEME
..........................................................................................................................336
10.1.1
OPERATIONSWERKSYNTHESE
.................................................................................................................
338
10.1.2
STEUERWERKSYNTHESE
.......................................................................................................................
340
10.2
MIKROPROGRAMMIERUNG
................................................................................................................................
343
10.3
UEBUNGSAUFGABEN
.............................................................................................................................................
349
11
MIKROPROZESSORTECHNIK
351
11.1
ELEMENTE
EINES
MIKRORECHNERS
....................................................................................................................
352
11.1.1
VON-NEUMANN-ARCHITEKTUR
..........................................................................................................
352
11.1.2
AUFBAU
DER
CPU
.............................................................................................................................
356
11.2
EIN
EINFACHER
MODELLPROZESSOR
....................................................................................................................
360
11.3
UEBUNGSAUFGABEN
.............................................................................................................................................
374
12
RECHNERSTRUKTUREN
377
12.1
RECHNERKLASSIFIKATION
NACH
FLYNN
..................................................................................................................
378
12.2
INSTRUKTIONSARCHITEKTUREN
.............................................................................................................................
379
12.2.1
CISC-PROZESSOREN
..........................................................................................................................
380
12.2.2
RISC-PROZESSOREN
..........................................................................................................................
384
12.3
METHODEN
ZUR
LEISTUNGSSTEIGERUNG
.............................................................................................................
388
12.3.1
PIPELINING
.......................................................................................................................................
388
12.3.2
CACHE-SPEICHER
.............................................................................................................................
393
12.4
LEISTUNGSBEWERTUNG
......................................................................................................................................
399
12.4.1
MASSZAHLEN
ZUR
LEISTUNGSBEWERTUNG
..............................................................................................
399
12.4.2
BENCHMARKS
...................................................................................................................................402
12.5
UEBUNGSAUFGABEN
.............................................................................................................................................
405
A
NOTATIONSVERZEICHNIS
411
B
ABKUERZUNGSVERZEICHNIS
413
C
GLOSSAR
415
LITERATURVERZEICHNIS
433
NAMENSVERZEICHNIS
437
SACHWORTVERZEICHNIS
439
|
any_adam_object | 1 |
author | Hoffmann, Dirk W. 1972- |
author_GND | (DE-588)122854802 |
author_facet | Hoffmann, Dirk W. 1972- |
author_role | aut |
author_sort | Hoffmann, Dirk W. 1972- |
author_variant | d w h dw dwh |
building | Verbundindex |
bvnumber | BV046347753 |
classification_rvk | ST 150 |
classification_tum | DAT 100f |
ctrlnum | (OCoLC)1129464987 (DE-599)DNB1200495543 |
dewey-full | 004 |
dewey-hundreds | 000 - Computer science, information, general works |
dewey-ones | 004 - Computer science |
dewey-raw | 004 |
dewey-search | 004 |
dewey-sort | 14 |
dewey-tens | 000 - Computer science, information, general works |
discipline | Informatik |
edition | 6., aktualisierte Auflage |
format | Book |
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genre | (DE-588)4123623-3 Lehrbuch gnd-content |
genre_facet | Lehrbuch |
id | DE-604.BV046347753 |
illustrated | Illustrated |
indexdate | 2024-07-10T08:42:20Z |
institution | BVB |
isbn | 9783446463141 3446463143 |
language | German |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-031724316 |
oclc_num | 1129464987 |
open_access_boolean | |
owner | DE-91G DE-BY-TUM DE-12 DE-1050 DE-634 DE-92 DE-1043 DE-1051 DE-1049 DE-Aug4 DE-210 DE-859 DE-523 DE-29T DE-20 DE-83 DE-19 DE-BY-UBM DE-526 DE-355 DE-BY-UBR |
owner_facet | DE-91G DE-BY-TUM DE-12 DE-1050 DE-634 DE-92 DE-1043 DE-1051 DE-1049 DE-Aug4 DE-210 DE-859 DE-523 DE-29T DE-20 DE-83 DE-19 DE-BY-UBM DE-526 DE-355 DE-BY-UBR |
physical | 447 Seiten Illustrationen, Diagramme 25 cm |
publishDate | 2020 |
publishDateSearch | 2020 |
publishDateSort | 2020 |
publisher | Hanser |
record_format | marc |
spelling | Hoffmann, Dirk W. 1972- Verfasser (DE-588)122854802 aut Grundlagen der Technischen Informatik Dirk W. Hoffmann 6., aktualisierte Auflage München Hanser [2020] © 2020 447 Seiten Illustrationen, Diagramme 25 cm txt rdacontent n rdamedia nc rdacarrier Technische Informatik (DE-588)4196734-3 gnd rswk-swf Anwendungsorientiert Bachelorstudium Boolesche Algebra Digitaltechnik Grundlagenbuch Grundlagenwissen Grundstudium Halbleitertechnik Hardware Informatik Lehrbuch Mikroprozessortechnik Rechnerentwurf Rechnerorganisation Rechnerstrukturen Schaltnetze Schaltwerke Selbststudium Speicherelemente Studienbuch Studienhilfe Zahlendarstellung FBITTINF: Technische Informatik FBLEHR: Lehrbuch INF2020 (DE-588)4123623-3 Lehrbuch gnd-content Technische Informatik (DE-588)4196734-3 s DE-604 Erscheint auch als Online-Ausgabe 978-3-446-46360-8 DNB Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=031724316&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
spellingShingle | Hoffmann, Dirk W. 1972- Grundlagen der Technischen Informatik Technische Informatik (DE-588)4196734-3 gnd |
subject_GND | (DE-588)4196734-3 (DE-588)4123623-3 |
title | Grundlagen der Technischen Informatik |
title_auth | Grundlagen der Technischen Informatik |
title_exact_search | Grundlagen der Technischen Informatik |
title_full | Grundlagen der Technischen Informatik Dirk W. Hoffmann |
title_fullStr | Grundlagen der Technischen Informatik Dirk W. Hoffmann |
title_full_unstemmed | Grundlagen der Technischen Informatik Dirk W. Hoffmann |
title_short | Grundlagen der Technischen Informatik |
title_sort | grundlagen der technischen informatik |
topic | Technische Informatik (DE-588)4196734-3 gnd |
topic_facet | Technische Informatik Lehrbuch |
url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=031724316&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
work_keys_str_mv | AT hoffmanndirkw grundlagendertechnischeninformatik |