VLSI test principles and architectures: design for testability
This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume. Most up-to-date coverage of design for testability. Coverage of indu...
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| Other Authors: | , , |
|---|---|
| Format: | Electronic eBook |
| Language: | English |
| Published: |
Amsterdam Boston
Elsevier Morgan Kaufmann Publishers
© 2006
|
| Series: | Morgan Kaufmann series in systems on silicon
|
| Subjects: | |
| Online Access: | FLA01 Volltext |
| Summary: | This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume. Most up-to-date coverage of design for testability. Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books. Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures. Lecture slides and exercise solutions for all chapters are now available. Instructors are also eligible for downloading PPT slide files and MSWORD solutions files from the manual website |
| Item Description: | Includes bibliographical references and index |
| Physical Description: | 1 online resource (xxx, 777 pages) illustrations |
| ISBN: | 9780080474793 0080474799 |
Staff View
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| id | DE-604.BV046123895 |
| illustrated | Illustrated |
| indexdate | 2024-07-10T08:35:49Z |
| institution | BVB |
| isbn | 9780080474793 0080474799 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-031504348 |
| oclc_num | 162573568 |
| open_access_boolean | |
| physical | 1 online resource (xxx, 777 pages) illustrations |
| psigel | ZDB-33-ESD ZDB-33-ESD FLA_PDA_ESD |
| publishDate | 2006 |
| publishDateSearch | 2006 |
| publishDateSort | 2006 |
| publisher | Elsevier Morgan Kaufmann Publishers |
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| series2 | Morgan Kaufmann series in systems on silicon |
| spelling | VLSI test principles and architectures design for testability edited by Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen Amsterdam Boston Elsevier Morgan Kaufmann Publishers © 2006 1 online resource (xxx, 777 pages) illustrations txt rdacontent c rdamedia cr rdacarrier Morgan Kaufmann series in systems on silicon Includes bibliographical references and index This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume. Most up-to-date coverage of design for testability. Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books. Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures. Lecture slides and exercise solutions for all chapters are now available. Instructors are also eligible for downloading PPT slide files and MSWORD solutions files from the manual website Circuits intégrés à très grande échelle / Essais Circuits intégrés à très grande échelle / Conception et construction TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic bisacsh COMPUTERS / Logic Design bisacsh Integrated circuits / Very large scale integration / Testing blmlsh Integrated circuits / Very large scale integration / Design blmlsh Integrated circuits / Very large scale integration / Design fast Integrated circuits / Very large scale integration / Testing fast Testen gnd VLSI gnd Circuitos integrados vlsi larpcal Integrated circuits / Very large scale integration / Testing Integrated circuits / Very large scale integration / Design Integrated circuits Very large scale integration Testing Integrated circuits Very large scale integration Design Testen (DE-588)4367264-4 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf VLSI (DE-588)4117388-0 s Testen (DE-588)4367264-4 s 1\p DE-604 Wang, Laung-Terng edt Wu, Cheng-Wen edt Wen, Xiaoqing edt Erscheint auch als Druck-Ausgabe 0123705975 Erscheint auch als Druck-Ausgabe 9780123705976 http://www.sciencedirect.com/science/book/9780123705976 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | VLSI test principles and architectures design for testability Circuits intégrés à très grande échelle / Essais Circuits intégrés à très grande échelle / Conception et construction TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic bisacsh COMPUTERS / Logic Design bisacsh Integrated circuits / Very large scale integration / Testing blmlsh Integrated circuits / Very large scale integration / Design blmlsh Integrated circuits / Very large scale integration / Design fast Integrated circuits / Very large scale integration / Testing fast Testen gnd VLSI gnd Circuitos integrados vlsi larpcal Integrated circuits / Very large scale integration / Testing Integrated circuits / Very large scale integration / Design Integrated circuits Very large scale integration Testing Integrated circuits Very large scale integration Design Testen (DE-588)4367264-4 gnd VLSI (DE-588)4117388-0 gnd |
| subject_GND | (DE-588)4367264-4 (DE-588)4117388-0 |
| title | VLSI test principles and architectures design for testability |
| title_auth | VLSI test principles and architectures design for testability |
| title_exact_search | VLSI test principles and architectures design for testability |
| title_full | VLSI test principles and architectures design for testability edited by Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen |
| title_fullStr | VLSI test principles and architectures design for testability edited by Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen |
| title_full_unstemmed | VLSI test principles and architectures design for testability edited by Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen |
| title_short | VLSI test principles and architectures |
| title_sort | vlsi test principles and architectures design for testability |
| title_sub | design for testability |
| topic | Circuits intégrés à très grande échelle / Essais Circuits intégrés à très grande échelle / Conception et construction TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic bisacsh COMPUTERS / Logic Design bisacsh Integrated circuits / Very large scale integration / Testing blmlsh Integrated circuits / Very large scale integration / Design blmlsh Integrated circuits / Very large scale integration / Design fast Integrated circuits / Very large scale integration / Testing fast Testen gnd VLSI gnd Circuitos integrados vlsi larpcal Integrated circuits / Very large scale integration / Testing Integrated circuits / Very large scale integration / Design Integrated circuits Very large scale integration Testing Integrated circuits Very large scale integration Design Testen (DE-588)4367264-4 gnd VLSI (DE-588)4117388-0 gnd |
| topic_facet | Circuits intégrés à très grande échelle / Essais Circuits intégrés à très grande échelle / Conception et construction TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic COMPUTERS / Logic Design Integrated circuits / Very large scale integration / Testing Integrated circuits / Very large scale integration / Design Testen VLSI Circuitos integrados vlsi Integrated circuits Very large scale integration Testing Integrated circuits Very large scale integration Design |
| url | http://www.sciencedirect.com/science/book/9780123705976 |
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