Metamodeling-driven IP reuse for SoC integration and microprocessor design:
Saved in:
| Main Author: | |
|---|---|
| Format: | Electronic eBook |
| Language: | English |
| Published: |
Boston
Artech House
2009
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| Subjects: | |
| Item Description: | Print version record |
| Physical Description: | 1 online resource (xxi, 287 pages) illustrations |
| ISBN: | 9781596934252 1596934255 |
Staff View
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| 245 | 1 | 0 | |a Metamodeling-driven IP reuse for SoC integration and microprocessor design |c Deepak A. Mathaikutty, Sandeep K. Shukla |
| 264 | 1 | |a Boston |b Artech House |c 2009 | |
| 300 | |a 1 online resource (xxi, 287 pages) |b illustrations | ||
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| 505 | 8 | |a This cutting-edge resource offers you an in-depth understanding of metamodeling approaches for the reuse of intellectual properties (IPs) in the form of reusable design or verification components. The book covers the essential issues associated with fast and effective integration of reusable design components into a system-on-a-chip (SoC) to achieve faster design turn-around time. Moreover, it addresses key factors related to the use of reusable verification IPs for a (3z (Bwrite once, use many times (3y (Bverification strategy – another effective approach that can attain a faster product design cycle | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. |2 bisacsh | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic |2 bisacsh | |
| 650 | 7 | |a COMPUTERS / Logic Design |2 bisacsh | |
| 650 | 7 | |a Computer software / Reusability |2 fast | |
| 650 | 7 | |a Computer software / Verification |2 fast | |
| 650 | 7 | |a Intellectual property |2 fast | |
| 650 | 7 | |a Microprocessors / Design and construction |2 fast | |
| 650 | 7 | |a System design |2 fast | |
| 650 | 7 | |a Systems on a chip / Design and construction |2 fast | |
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| author | Mathaikutty, Deepak A. |
| author_facet | Mathaikutty, Deepak A. |
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| building | Verbundindex |
| bvnumber | BV045343400 |
| collection | ZDB-4-ENC |
| contents | This cutting-edge resource offers you an in-depth understanding of metamodeling approaches for the reuse of intellectual properties (IPs) in the form of reusable design or verification components. The book covers the essential issues associated with fast and effective integration of reusable design components into a system-on-a-chip (SoC) to achieve faster design turn-around time. Moreover, it addresses key factors related to the use of reusable verification IPs for a (3z (Bwrite once, use many times (3y (Bverification strategy – another effective approach that can attain a faster product design cycle |
| ctrlnum | (ZDB-4-ENC)ocn547448110 (OCoLC)547448110 (DE-599)BVBBV045343400 |
| dewey-full | 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
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| id | DE-604.BV045343400 |
| illustrated | Illustrated |
| indexdate | 2024-07-10T08:15:29Z |
| institution | BVB |
| isbn | 9781596934252 1596934255 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030730102 |
| oclc_num | 547448110 |
| open_access_boolean | |
| physical | 1 online resource (xxi, 287 pages) illustrations |
| psigel | ZDB-4-ENC |
| publishDate | 2009 |
| publishDateSearch | 2009 |
| publishDateSort | 2009 |
| publisher | Artech House |
| record_format | marc |
| spelling | Mathaikutty, Deepak A. Verfasser aut Metamodeling-driven IP reuse for SoC integration and microprocessor design Deepak A. Mathaikutty, Sandeep K. Shukla Boston Artech House 2009 1 online resource (xxi, 287 pages) illustrations txt rdacontent c rdamedia cr rdacarrier Print version record This cutting-edge resource offers you an in-depth understanding of metamodeling approaches for the reuse of intellectual properties (IPs) in the form of reusable design or verification components. The book covers the essential issues associated with fast and effective integration of reusable design components into a system-on-a-chip (SoC) to achieve faster design turn-around time. Moreover, it addresses key factors related to the use of reusable verification IPs for a (3z (Bwrite once, use many times (3y (Bverification strategy – another effective approach that can attain a faster product design cycle TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic bisacsh COMPUTERS / Logic Design bisacsh Computer software / Reusability fast Computer software / Verification fast Intellectual property fast Microprocessors / Design and construction fast System design fast Systems on a chip / Design and construction fast Computer software Reusability Computer software Verification Systems on a chip Design and construction Microprocessors Design and construction Intellectual property System design Shukla, Sandeep K. Sonstige oth Erscheint auch als Druck-Ausgabe Mathaikutty, Deepak A. Metamodeling-driven IP reuse for SoC integration and microprocessor design Boston : Artech House, 2009 9781596934245 |
| spellingShingle | Mathaikutty, Deepak A. Metamodeling-driven IP reuse for SoC integration and microprocessor design This cutting-edge resource offers you an in-depth understanding of metamodeling approaches for the reuse of intellectual properties (IPs) in the form of reusable design or verification components. The book covers the essential issues associated with fast and effective integration of reusable design components into a system-on-a-chip (SoC) to achieve faster design turn-around time. Moreover, it addresses key factors related to the use of reusable verification IPs for a (3z (Bwrite once, use many times (3y (Bverification strategy – another effective approach that can attain a faster product design cycle TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic bisacsh COMPUTERS / Logic Design bisacsh Computer software / Reusability fast Computer software / Verification fast Intellectual property fast Microprocessors / Design and construction fast System design fast Systems on a chip / Design and construction fast Computer software Reusability Computer software Verification Systems on a chip Design and construction Microprocessors Design and construction Intellectual property System design |
| title | Metamodeling-driven IP reuse for SoC integration and microprocessor design |
| title_auth | Metamodeling-driven IP reuse for SoC integration and microprocessor design |
| title_exact_search | Metamodeling-driven IP reuse for SoC integration and microprocessor design |
| title_full | Metamodeling-driven IP reuse for SoC integration and microprocessor design Deepak A. Mathaikutty, Sandeep K. Shukla |
| title_fullStr | Metamodeling-driven IP reuse for SoC integration and microprocessor design Deepak A. Mathaikutty, Sandeep K. Shukla |
| title_full_unstemmed | Metamodeling-driven IP reuse for SoC integration and microprocessor design Deepak A. Mathaikutty, Sandeep K. Shukla |
| title_short | Metamodeling-driven IP reuse for SoC integration and microprocessor design |
| title_sort | metamodeling driven ip reuse for soc integration and microprocessor design |
| topic | TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic bisacsh COMPUTERS / Logic Design bisacsh Computer software / Reusability fast Computer software / Verification fast Intellectual property fast Microprocessors / Design and construction fast System design fast Systems on a chip / Design and construction fast Computer software Reusability Computer software Verification Systems on a chip Design and construction Microprocessors Design and construction Intellectual property System design |
| topic_facet | TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic COMPUTERS / Logic Design Computer software / Reusability Computer software / Verification Intellectual property Microprocessors / Design and construction System design Systems on a chip / Design and construction Computer software Reusability Computer software Verification Systems on a chip Design and construction Microprocessors Design and construction Intellectual property System design |
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