Design recipes for FPGAs:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Amsterdam ; Boston ; London
Newnes
2007
|
| Schlagworte: | |
| Beschreibung: | Print version record |
| Beschreibung: | 1 online resource (xxii, 289 pages) illustrations |
| ISBN: | 9780080548425 0080548423 |
Internformat
MARC
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| 082 | 0 | |a 621.395 |2 22 | |
| 100 | 1 | |a Wilson, Peter R. |d 1939- |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Design recipes for FPGAs |c Peter R. Wilson |
| 264 | 1 | |a Amsterdam ; Boston ; London |b Newnes |c 2007 | |
| 300 | |a 1 online resource (xxii, 289 pages) |b illustrations | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 500 | |a Print version record | ||
| 505 | 8 | |a A rich treasure chest of design techniques and templates for solving practical, every-day problems using FPGAs | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. |2 bisacsh | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic |2 bisacsh | |
| 650 | 7 | |a COMPUTERS / Logic Design |2 bisacsh | |
| 650 | 7 | |a Field programmable gate arrays / Design and construction |2 fast | |
| 650 | 4 | |a Field programmable gate arrays |x Design and construction | |
| 650 | 0 | 7 | |a VHDL |0 (DE-588)4254792-1 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VERILOG |0 (DE-588)4268385-3 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Field programmable gate array |0 (DE-588)4347749-5 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Field programmable gate array |0 (DE-588)4347749-5 |D s |
| 689 | 0 | 1 | |a VERILOG |0 (DE-588)4268385-3 |D s |
| 689 | 0 | 2 | |a VHDL |0 (DE-588)4254792-1 |D s |
| 689 | 0 | |8 1\p |5 DE-604 | |
| 776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |a Wilson, Peter R. (Peter Robert), 1939- |t Design recipes for FPGAs |d Amsterdam ; Boston ; London : Newnes, 2007 |z 9780750668453 |z 0750668458 |
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Datensatz im Suchindex
| _version_ | 1804179159574904832 |
|---|---|
| any_adam_object | |
| author | Wilson, Peter R. 1939- |
| author_facet | Wilson, Peter R. 1939- |
| author_role | aut |
| author_sort | Wilson, Peter R. 1939- |
| author_variant | p r w pr prw |
| building | Verbundindex |
| bvnumber | BV045342145 |
| collection | ZDB-4-ENC |
| contents | A rich treasure chest of design techniques and templates for solving practical, every-day problems using FPGAs |
| ctrlnum | (ZDB-4-ENC)ocn173502373 (OCoLC)173502373 (DE-599)BVBBV045342145 |
| dewey-full | 621.395 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.395 |
| dewey-search | 621.395 |
| dewey-sort | 3621.395 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
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| id | DE-604.BV045342145 |
| illustrated | Illustrated |
| indexdate | 2024-07-10T08:15:26Z |
| institution | BVB |
| isbn | 9780080548425 0080548423 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030728848 |
| oclc_num | 173502373 |
| open_access_boolean | |
| physical | 1 online resource (xxii, 289 pages) illustrations |
| psigel | ZDB-4-ENC |
| publishDate | 2007 |
| publishDateSearch | 2007 |
| publishDateSort | 2007 |
| publisher | Newnes |
| record_format | marc |
| spelling | Wilson, Peter R. 1939- Verfasser aut Design recipes for FPGAs Peter R. Wilson Amsterdam ; Boston ; London Newnes 2007 1 online resource (xxii, 289 pages) illustrations txt rdacontent c rdamedia cr rdacarrier Print version record A rich treasure chest of design techniques and templates for solving practical, every-day problems using FPGAs TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic bisacsh COMPUTERS / Logic Design bisacsh Field programmable gate arrays / Design and construction fast Field programmable gate arrays Design and construction VHDL (DE-588)4254792-1 gnd rswk-swf VERILOG (DE-588)4268385-3 gnd rswk-swf Field programmable gate array (DE-588)4347749-5 gnd rswk-swf Field programmable gate array (DE-588)4347749-5 s VERILOG (DE-588)4268385-3 s VHDL (DE-588)4254792-1 s 1\p DE-604 Erscheint auch als Druck-Ausgabe Wilson, Peter R. (Peter Robert), 1939- Design recipes for FPGAs Amsterdam ; Boston ; London : Newnes, 2007 9780750668453 0750668458 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Wilson, Peter R. 1939- Design recipes for FPGAs A rich treasure chest of design techniques and templates for solving practical, every-day problems using FPGAs TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic bisacsh COMPUTERS / Logic Design bisacsh Field programmable gate arrays / Design and construction fast Field programmable gate arrays Design and construction VHDL (DE-588)4254792-1 gnd VERILOG (DE-588)4268385-3 gnd Field programmable gate array (DE-588)4347749-5 gnd |
| subject_GND | (DE-588)4254792-1 (DE-588)4268385-3 (DE-588)4347749-5 |
| title | Design recipes for FPGAs |
| title_auth | Design recipes for FPGAs |
| title_exact_search | Design recipes for FPGAs |
| title_full | Design recipes for FPGAs Peter R. Wilson |
| title_fullStr | Design recipes for FPGAs Peter R. Wilson |
| title_full_unstemmed | Design recipes for FPGAs Peter R. Wilson |
| title_short | Design recipes for FPGAs |
| title_sort | design recipes for fpgas |
| topic | TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic bisacsh COMPUTERS / Logic Design bisacsh Field programmable gate arrays / Design and construction fast Field programmable gate arrays Design and construction VHDL (DE-588)4254792-1 gnd VERILOG (DE-588)4268385-3 gnd Field programmable gate array (DE-588)4347749-5 gnd |
| topic_facet | TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic COMPUTERS / Logic Design Field programmable gate arrays / Design and construction Field programmable gate arrays Design and construction VHDL VERILOG Field programmable gate array |
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