ESL design and verification: a prescription for electronic system-level methodology = Electronic system-level design
Gespeichert in:
1. Verfasser: | |
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Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Amsterdam ; Boston
Morgan Kaufmann
2007
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Schriftenreihe: | Morgan Kaufmann series in systems on silicon
|
Schlagworte: | |
Beschreibung: | Print version record |
Beschreibung: | 1 online resource (xxv, 462 pages) illustrations |
ISBN: | 9780080488837 0080488838 |
Internformat
MARC
LEADER | 00000nmm a2200000zc 4500 | ||
---|---|---|---|
001 | BV045341600 | ||
003 | DE-604 | ||
005 | 00000000000000.0 | ||
007 | cr|uuu---uuuuu | ||
008 | 181206s2007 |||| o||u| ||||||eng d | ||
020 | |a 9780080488837 |9 978-0-08-048883-7 | ||
020 | |a 0080488838 |9 0-08-048883-8 | ||
035 | |a (ZDB-4-ENC)ocn146316668 | ||
035 | |a (OCoLC)146316668 | ||
035 | |a (DE-599)BVBBV045341600 | ||
040 | |a DE-604 |b ger |e rda | ||
041 | 0 | |a eng | |
082 | 0 | |a 621.3815 |2 22 | |
100 | 1 | |a Bailey, Brian |d 1959- |e Verfasser |4 aut | |
245 | 1 | 0 | |a ESL design and verification |b a prescription for electronic system-level methodology = Electronic system-level design |c Brian Bailey, Grant Martin, Andrew Piziali |
246 | 1 | 3 | |a Electronic system-level design |
246 | 1 | 1 | |a Electronic system-level design |
264 | 1 | |a Amsterdam ; Boston |b Morgan Kaufmann |c 2007 | |
300 | |a 1 online resource (xxv, 462 pages) |b illustrations | ||
336 | |b txt |2 rdacontent | ||
337 | |b c |2 rdamedia | ||
338 | |b cr |2 rdacarrier | ||
490 | 0 | |a Morgan Kaufmann series in systems on silicon | |
500 | |a Print version record | ||
505 | 8 | |a Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Visit the authors' companion site! http://www.electronicsystemlevel.com/ * Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts | |
650 | 7 | |a TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated |2 bisacsh | |
650 | 7 | |a TECHNOLOGY & ENGINEERING / Electronics / Circuits / General |2 bisacsh | |
650 | 7 | |a Systems on a chip / Design and construction |2 blmlsh | |
650 | 7 | |a Systems on a chip / Design and construction |2 fast | |
650 | 4 | |a Systems on a chip |x Design and construction | |
650 | 0 | 7 | |a Verifikation |0 (DE-588)4135577-5 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Systementwurf |0 (DE-588)4261480-6 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a System-on-Chip |0 (DE-588)4740357-3 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a System-on-Chip |0 (DE-588)4740357-3 |D s |
689 | 0 | 1 | |a Systementwurf |0 (DE-588)4261480-6 |D s |
689 | 0 | 2 | |a Verifikation |0 (DE-588)4135577-5 |D s |
689 | 0 | |8 1\p |5 DE-604 | |
700 | 1 | |a Martin, Grant |e Sonstige |4 oth | |
700 | 1 | |a Piziali, Andrew |e Sonstige |4 oth | |
776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |a Bailey, Brian, 1959- |t ESL design and verification |d Amsterdam ; Boston : Morgan Kaufmann, 2007 |z 9780123735515 |z 0123735513 |
912 | |a ZDB-4-ENC | ||
999 | |a oai:aleph.bib-bvb.de:BVB01-030728304 | ||
883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk |
Datensatz im Suchindex
_version_ | 1804179158447685632 |
---|---|
any_adam_object | |
author | Bailey, Brian 1959- |
author_facet | Bailey, Brian 1959- |
author_role | aut |
author_sort | Bailey, Brian 1959- |
author_variant | b b bb |
building | Verbundindex |
bvnumber | BV045341600 |
collection | ZDB-4-ENC |
contents | Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Visit the authors' companion site! http://www.electronicsystemlevel.com/ * Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts |
ctrlnum | (ZDB-4-ENC)ocn146316668 (OCoLC)146316668 (DE-599)BVBBV045341600 |
dewey-full | 621.3815 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.3815 |
dewey-search | 621.3815 |
dewey-sort | 3621.3815 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
format | Electronic eBook |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>03782nmm a2200541zc 4500</leader><controlfield tag="001">BV045341600</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">181206s2007 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9780080488837</subfield><subfield code="9">978-0-08-048883-7</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0080488838</subfield><subfield code="9">0-08-048883-8</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-4-ENC)ocn146316668</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)146316668</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV045341600</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rda</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815</subfield><subfield code="2">22</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Bailey, Brian</subfield><subfield code="d">1959-</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">ESL design and verification</subfield><subfield code="b">a prescription for electronic system-level methodology = Electronic system-level design</subfield><subfield code="c">Brian Bailey, Grant Martin, Andrew Piziali</subfield></datafield><datafield tag="246" ind1="1" ind2="3"><subfield code="a">Electronic system-level design</subfield></datafield><datafield tag="246" ind1="1" ind2="1"><subfield code="a">Electronic system-level design</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Amsterdam ; Boston</subfield><subfield code="b">Morgan Kaufmann</subfield><subfield code="c">2007</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 online resource (xxv, 462 pages)</subfield><subfield code="b">illustrations</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">Morgan Kaufmann series in systems on silicon</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Print version record</subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Visit the authors' companion site! http://www.electronicsystemlevel.com/ * Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">TECHNOLOGY & ENGINEERING / Electronics / Circuits / General</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Systems on a chip / Design and construction</subfield><subfield code="2">blmlsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Systems on a chip / Design and construction</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Systems on a chip</subfield><subfield code="x">Design and construction</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Verifikation</subfield><subfield code="0">(DE-588)4135577-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Systementwurf</subfield><subfield code="0">(DE-588)4261480-6</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">System-on-Chip</subfield><subfield code="0">(DE-588)4740357-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">System-on-Chip</subfield><subfield code="0">(DE-588)4740357-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Systementwurf</subfield><subfield code="0">(DE-588)4261480-6</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">Verifikation</subfield><subfield code="0">(DE-588)4135577-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Martin, Grant</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Piziali, Andrew</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="a">Bailey, Brian, 1959-</subfield><subfield code="t">ESL design and verification</subfield><subfield code="d">Amsterdam ; Boston : Morgan Kaufmann, 2007</subfield><subfield code="z">9780123735515</subfield><subfield code="z">0123735513</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-4-ENC</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-030728304</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield></record></collection> |
id | DE-604.BV045341600 |
illustrated | Illustrated |
indexdate | 2024-07-10T08:15:25Z |
institution | BVB |
isbn | 9780080488837 0080488838 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030728304 |
oclc_num | 146316668 |
open_access_boolean | |
physical | 1 online resource (xxv, 462 pages) illustrations |
psigel | ZDB-4-ENC |
publishDate | 2007 |
publishDateSearch | 2007 |
publishDateSort | 2007 |
publisher | Morgan Kaufmann |
record_format | marc |
series2 | Morgan Kaufmann series in systems on silicon |
spelling | Bailey, Brian 1959- Verfasser aut ESL design and verification a prescription for electronic system-level methodology = Electronic system-level design Brian Bailey, Grant Martin, Andrew Piziali Electronic system-level design Amsterdam ; Boston Morgan Kaufmann 2007 1 online resource (xxv, 462 pages) illustrations txt rdacontent c rdamedia cr rdacarrier Morgan Kaufmann series in systems on silicon Print version record Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Visit the authors' companion site! http://www.electronicsystemlevel.com/ * Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / General bisacsh Systems on a chip / Design and construction blmlsh Systems on a chip / Design and construction fast Systems on a chip Design and construction Verifikation (DE-588)4135577-5 gnd rswk-swf Systementwurf (DE-588)4261480-6 gnd rswk-swf System-on-Chip (DE-588)4740357-3 gnd rswk-swf System-on-Chip (DE-588)4740357-3 s Systementwurf (DE-588)4261480-6 s Verifikation (DE-588)4135577-5 s 1\p DE-604 Martin, Grant Sonstige oth Piziali, Andrew Sonstige oth Erscheint auch als Druck-Ausgabe Bailey, Brian, 1959- ESL design and verification Amsterdam ; Boston : Morgan Kaufmann, 2007 9780123735515 0123735513 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Bailey, Brian 1959- ESL design and verification a prescription for electronic system-level methodology = Electronic system-level design Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Visit the authors' companion site! http://www.electronicsystemlevel.com/ * Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / General bisacsh Systems on a chip / Design and construction blmlsh Systems on a chip / Design and construction fast Systems on a chip Design and construction Verifikation (DE-588)4135577-5 gnd Systementwurf (DE-588)4261480-6 gnd System-on-Chip (DE-588)4740357-3 gnd |
subject_GND | (DE-588)4135577-5 (DE-588)4261480-6 (DE-588)4740357-3 |
title | ESL design and verification a prescription for electronic system-level methodology = Electronic system-level design |
title_alt | Electronic system-level design |
title_auth | ESL design and verification a prescription for electronic system-level methodology = Electronic system-level design |
title_exact_search | ESL design and verification a prescription for electronic system-level methodology = Electronic system-level design |
title_full | ESL design and verification a prescription for electronic system-level methodology = Electronic system-level design Brian Bailey, Grant Martin, Andrew Piziali |
title_fullStr | ESL design and verification a prescription for electronic system-level methodology = Electronic system-level design Brian Bailey, Grant Martin, Andrew Piziali |
title_full_unstemmed | ESL design and verification a prescription for electronic system-level methodology = Electronic system-level design Brian Bailey, Grant Martin, Andrew Piziali |
title_short | ESL design and verification |
title_sort | esl design and verification a prescription for electronic system level methodology electronic system level design |
title_sub | a prescription for electronic system-level methodology = Electronic system-level design |
topic | TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / General bisacsh Systems on a chip / Design and construction blmlsh Systems on a chip / Design and construction fast Systems on a chip Design and construction Verifikation (DE-588)4135577-5 gnd Systementwurf (DE-588)4261480-6 gnd System-on-Chip (DE-588)4740357-3 gnd |
topic_facet | TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated TECHNOLOGY & ENGINEERING / Electronics / Circuits / General Systems on a chip / Design and construction Systems on a chip Design and construction Verifikation Systementwurf System-on-Chip |
work_keys_str_mv | AT baileybrian esldesignandverificationaprescriptionforelectronicsystemlevelmethodologyelectronicsystemleveldesign AT martingrant esldesignandverificationaprescriptionforelectronicsystemlevelmethodologyelectronicsystemleveldesign AT pizialiandrew esldesignandverificationaprescriptionforelectronicsystemlevelmethodologyelectronicsystemleveldesign AT baileybrian electronicsystemleveldesign AT martingrant electronicsystemleveldesign AT pizialiandrew electronicsystemleveldesign |