Jayanthy, S., & Bhuvaneswari, M. (2019). Test Generation of Crosstalk Delay Faults in VLSI Circuits. Springer Singapore. https://doi.org/10.1007/978-981-13-2493-2
Chicago Style (17th ed.) CitationJayanthy, S., and M.C Bhuvaneswari. Test Generation of Crosstalk Delay Faults in VLSI Circuits. Singapore: Springer Singapore, 2019. https://doi.org/10.1007/978-981-13-2493-2.
MLA (9th ed.) CitationJayanthy, S., and M.C Bhuvaneswari. Test Generation of Crosstalk Delay Faults in VLSI Circuits. Springer Singapore, 2019. https://doi.org/10.1007/978-981-13-2493-2.
Warning: These citations may not always be 100% accurate.