Verfügbarkeit: Test Generation of Crosstalk Delay Faults in VLSI Circuits

Test Generation of Crosstalk Delay Faults in VLSI Circuits:

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Hauptverfasser:	Jayanthy, S. (VerfasserIn), Bhuvaneswari, M.C (VerfasserIn)
Format:	Elektronisch E-Book
Sprache:	English
Veröffentlicht:	Singapore Springer Singapore 2019
Schlagworte:	Circuits and Systems Control Structures and Microprogramming Performance and Reliability Logic Design Systems engineering Microprogramming Operating systems (Computers) Logic design
Online-Zugang:	BTU01 FAW01 FHA01 FHI01 FHM01 FHN01 FHR01 FKE01 FLA01 FRO01 FWS01 FWS02 HTW01 TUM01 UBA01 UBY01 Volltext
Beschreibung:	1 Online-Ressource (XI, 156 p. 49 illus., 7 illus. in color)
ISBN:	9789811324932
DOI:	10.1007/978-981-13-2493-2

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Datensatz im Suchindex

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indexdate	2024-08-01T13:41:08Z
institution	BVB
isbn	9789811324932
language	English
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spellingShingle	Jayanthy, S. Bhuvaneswari, M.C Test Generation of Crosstalk Delay Faults in VLSI Circuits Circuits and Systems Control Structures and Microprogramming Performance and Reliability Logic Design Systems engineering Microprogramming Operating systems (Computers) Logic design
title	Test Generation of Crosstalk Delay Faults in VLSI Circuits
title_auth	Test Generation of Crosstalk Delay Faults in VLSI Circuits
title_exact_search	Test Generation of Crosstalk Delay Faults in VLSI Circuits
title_full	Test Generation of Crosstalk Delay Faults in VLSI Circuits by S. Jayanthy, M.C. Bhuvaneswari
title_fullStr	Test Generation of Crosstalk Delay Faults in VLSI Circuits by S. Jayanthy, M.C. Bhuvaneswari
title_full_unstemmed	Test Generation of Crosstalk Delay Faults in VLSI Circuits by S. Jayanthy, M.C. Bhuvaneswari
title_short	Test Generation of Crosstalk Delay Faults in VLSI Circuits
title_sort	test generation of crosstalk delay faults in vlsi circuits
topic	Circuits and Systems Control Structures and Microprogramming Performance and Reliability Logic Design Systems engineering Microprogramming Operating systems (Computers) Logic design
topic_facet	Circuits and Systems Control Structures and Microprogramming Performance and Reliability Logic Design Systems engineering Microprogramming Operating systems (Computers) Logic design
url	https://doi.org/10.1007/978-981-13-2493-2
work_keys_str_mv	AT jayanthys testgenerationofcrosstalkdelayfaultsinvlsicircuits AT bhuvaneswarimc testgenerationofcrosstalkdelayfaultsinvlsicircuits

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