Wave Pipelining: Theory and CMOS Implementation:
The quest for higher performance digital systems for applications such as gen eral purpose computing, signal/image processing, and telecommunications and an increasing cost consciousness have led to a major thrust for high speed VLSI systems implemented in inexpensive and widely available technolog...
Gespeichert in:
Hauptverfasser: | , , |
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Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Boston, MA
Springer US
1994
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Schriftenreihe: | The Kluwer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing
248 |
Schlagworte: | |
Online-Zugang: | BTU01 Volltext |
Zusammenfassung: | The quest for higher performance digital systems for applications such as gen eral purpose computing, signal/image processing, and telecommunications and an increasing cost consciousness have led to a major thrust for high speed VLSI systems implemented in inexpensive and widely available technologies such as CMOS. This monograph, based on the first author's doctoral dissertation, con centrates on the technique of wave pipelining as one method toward achieving this goal. The primary focus of this monograph is to provide a coherent pre sentation of the theory of wave pipelined operation of digital circuits and to discuss practical design techniques for the realization of wave pipelined circuits in the CMOS technology. Wave pipelining can be applied to a variety of cir cuits for increased performance. For example, many architectures that support systolic computation lend themselves to wave pipelined realization. Also, the wave pipeline design methodology emphasizes the role of controlled clock skew in extracting enhanced performance from circuits that are not deeply pipelined. Wave pipelining (also known as maximal rate pipelining) is a timing method ology used in digital systems to increase the number of effective pipeline stages without increasing the number of physical registers in the pipeline. Using this technique, new data is applied to the inputs of a combinational logic block be fore the outputs due to previous inputs are available thus effectively pipelining the combinational logic and maximizing the utilization of the logic |
Beschreibung: | 1 Online-Ressource (XVIII, 206 p) |
ISBN: | 9781461532064 |
DOI: | 10.1007/978-1-4615-3206-4 |
Internformat
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520 | |a The quest for higher performance digital systems for applications such as gen eral purpose computing, signal/image processing, and telecommunications and an increasing cost consciousness have led to a major thrust for high speed VLSI systems implemented in inexpensive and widely available technologies such as CMOS. This monograph, based on the first author's doctoral dissertation, con centrates on the technique of wave pipelining as one method toward achieving this goal. The primary focus of this monograph is to provide a coherent pre sentation of the theory of wave pipelined operation of digital circuits and to discuss practical design techniques for the realization of wave pipelined circuits in the CMOS technology. Wave pipelining can be applied to a variety of cir cuits for increased performance. For example, many architectures that support systolic computation lend themselves to wave pipelined realization. Also, the wave pipeline design methodology emphasizes the role of controlled clock skew in extracting enhanced performance from circuits that are not deeply pipelined. Wave pipelining (also known as maximal rate pipelining) is a timing method ology used in digital systems to increase the number of effective pipeline stages without increasing the number of physical registers in the pipeline. Using this technique, new data is applied to the inputs of a combinational logic block be fore the outputs due to previous inputs are available thus effectively pipelining the combinational logic and maximizing the utilization of the logic | ||
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Datensatz im Suchindex
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author | Gray, C. Thomas Liu, Wentai Cavin, Ralph K. |
author_facet | Gray, C. Thomas Liu, Wentai Cavin, Ralph K. |
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discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
doi_str_mv | 10.1007/978-1-4615-3206-4 |
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indexdate | 2024-07-10T08:11:00Z |
institution | BVB |
isbn | 9781461532064 |
language | English |
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publishDate | 1994 |
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series2 | The Kluwer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing |
spelling | Gray, C. Thomas Verfasser aut Wave Pipelining: Theory and CMOS Implementation by C. Thomas Gray, Wentai Liu, Ralph K. Cavin Boston, MA Springer US 1994 1 Online-Ressource (XVIII, 206 p) txt rdacontent c rdamedia cr rdacarrier The Kluwer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing 248 The quest for higher performance digital systems for applications such as gen eral purpose computing, signal/image processing, and telecommunications and an increasing cost consciousness have led to a major thrust for high speed VLSI systems implemented in inexpensive and widely available technologies such as CMOS. This monograph, based on the first author's doctoral dissertation, con centrates on the technique of wave pipelining as one method toward achieving this goal. The primary focus of this monograph is to provide a coherent pre sentation of the theory of wave pipelined operation of digital circuits and to discuss practical design techniques for the realization of wave pipelined circuits in the CMOS technology. Wave pipelining can be applied to a variety of cir cuits for increased performance. For example, many architectures that support systolic computation lend themselves to wave pipelined realization. Also, the wave pipeline design methodology emphasizes the role of controlled clock skew in extracting enhanced performance from circuits that are not deeply pipelined. Wave pipelining (also known as maximal rate pipelining) is a timing method ology used in digital systems to increase the number of effective pipeline stages without increasing the number of physical registers in the pipeline. Using this technique, new data is applied to the inputs of a combinational logic block be fore the outputs due to previous inputs are available thus effectively pipelining the combinational logic and maximizing the utilization of the logic Engineering Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Digitales System (DE-588)4012300-5 gnd rswk-swf CMOS-Schaltung (DE-588)4148111-2 gnd rswk-swf Pipeline-Rechner (DE-588)4174741-0 gnd rswk-swf Digitales System (DE-588)4012300-5 s Pipeline-Rechner (DE-588)4174741-0 s CMOS-Schaltung (DE-588)4148111-2 s 1\p DE-604 Liu, Wentai aut Cavin, Ralph K. aut Erscheint auch als Druck-Ausgabe 9781461364078 https://doi.org/10.1007/978-1-4615-3206-4 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Gray, C. Thomas Liu, Wentai Cavin, Ralph K. Wave Pipelining: Theory and CMOS Implementation Engineering Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Digitales System (DE-588)4012300-5 gnd CMOS-Schaltung (DE-588)4148111-2 gnd Pipeline-Rechner (DE-588)4174741-0 gnd |
subject_GND | (DE-588)4012300-5 (DE-588)4148111-2 (DE-588)4174741-0 |
title | Wave Pipelining: Theory and CMOS Implementation |
title_auth | Wave Pipelining: Theory and CMOS Implementation |
title_exact_search | Wave Pipelining: Theory and CMOS Implementation |
title_full | Wave Pipelining: Theory and CMOS Implementation by C. Thomas Gray, Wentai Liu, Ralph K. Cavin |
title_fullStr | Wave Pipelining: Theory and CMOS Implementation by C. Thomas Gray, Wentai Liu, Ralph K. Cavin |
title_full_unstemmed | Wave Pipelining: Theory and CMOS Implementation by C. Thomas Gray, Wentai Liu, Ralph K. Cavin |
title_short | Wave Pipelining: Theory and CMOS Implementation |
title_sort | wave pipelining theory and cmos implementation |
topic | Engineering Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Digitales System (DE-588)4012300-5 gnd CMOS-Schaltung (DE-588)4148111-2 gnd Pipeline-Rechner (DE-588)4174741-0 gnd |
topic_facet | Engineering Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Digitales System CMOS-Schaltung Pipeline-Rechner |
url | https://doi.org/10.1007/978-1-4615-3206-4 |
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