Algorithms and Techniques for VLSI Layout Synthesis:
This book describes a system of VLSI layout tools called IDA which stands for "Integrated Design Aides. " It is not a main-line production CAD environment, but neither is it a paper tool. Rather, IDA is an experimental environment that serves to test out CAD ideas in the crucible of real c...
Gespeichert in:
| Hauptverfasser: | , , , |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Boston, MA
Springer US
1989
|
| Schriftenreihe: | The Kluwer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing
65 |
| Schlagworte: | |
| Online-Zugang: | BTU01 Volltext |
| Zusammenfassung: | This book describes a system of VLSI layout tools called IDA which stands for "Integrated Design Aides. " It is not a main-line production CAD environment, but neither is it a paper tool. Rather, IDA is an experimental environment that serves to test out CAD ideas in the crucible of real chip design. Many features have been tried in IDA over the years, some successfully, some not. This book will emphasize the former, and attempt to describe the features that have been useful and effective in building real chips. Before discussing the present state of IDA, it may be helpful to understand how the project got started. Although Bell Labs has traditionally had a large and effective effort in VLSI and CAD, researchers at the Murray Hill facility wanted to study the process of VLSI design independently, emphasizing the idea of small team chip building. So, in 1979 they invited Carver Mead to present his views on MOS chip design, complete with the now famous "lambda" design rules and "tall, thin designers. " To support this course, Steve Johnson (better known for YACC and the portable C compiler) and Sally Browning invented the constraint based "i" language and wrote a compiler for it. A small collection of layout tools developed rapidly around this compiler, including design rule checkers, editors and simulators |
| Beschreibung: | 1 Online-Ressource (XVI, 212 p) |
| ISBN: | 9781461317074 |
| DOI: | 10.1007/978-1-4613-1707-4 |
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| id | DE-604.BV045187787 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T08:11:00Z |
| institution | BVB |
| isbn | 9781461317074 |
| language | English |
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| series2 | The Kluwer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing |
| spelling | Hill, Dwight Verfasser aut Algorithms and Techniques for VLSI Layout Synthesis by Dwight Hill, Don Shugard, John Fishburn, Kurt Keutzer Boston, MA Springer US 1989 1 Online-Ressource (XVI, 212 p) txt rdacontent c rdamedia cr rdacarrier The Kluwer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing 65 This book describes a system of VLSI layout tools called IDA which stands for "Integrated Design Aides. " It is not a main-line production CAD environment, but neither is it a paper tool. Rather, IDA is an experimental environment that serves to test out CAD ideas in the crucible of real chip design. Many features have been tried in IDA over the years, some successfully, some not. This book will emphasize the former, and attempt to describe the features that have been useful and effective in building real chips. Before discussing the present state of IDA, it may be helpful to understand how the project got started. Although Bell Labs has traditionally had a large and effective effort in VLSI and CAD, researchers at the Murray Hill facility wanted to study the process of VLSI design independently, emphasizing the idea of small team chip building. So, in 1979 they invited Carver Mead to present his views on MOS chip design, complete with the now famous "lambda" design rules and "tall, thin designers. " To support this course, Steve Johnson (better known for YACC and the portable C compiler) and Sally Browning invented the constraint based "i" language and wrote a compiler for it. A small collection of layout tools developed rapidly around this compiler, including design rule checkers, editors and simulators Engineering Electrical Engineering Electrical engineering Design (DE-588)4011510-0 gnd rswk-swf Entwurf (DE-588)4121208-3 gnd rswk-swf Datenstruktur (DE-588)4011146-5 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf Algorithmus (DE-588)4001183-5 gnd rswk-swf Layout Mikroelektronik (DE-588)4264372-7 gnd rswk-swf Geometrische Ordnung (DE-588)4156719-5 gnd rswk-swf VLSI (DE-588)4117388-0 s Layout Mikroelektronik (DE-588)4264372-7 s 1\p DE-604 Entwurf (DE-588)4121208-3 s 2\p DE-604 Algorithmus (DE-588)4001183-5 s 3\p DE-604 Geometrische Ordnung (DE-588)4156719-5 s 4\p DE-604 Datenstruktur (DE-588)4011146-5 s 5\p DE-604 Design (DE-588)4011510-0 s 6\p DE-604 Shugard, Don aut Fishburn, John aut Keutzer, Kurt aut Erscheint auch als Druck-Ausgabe 9781461289623 https://doi.org/10.1007/978-1-4613-1707-4 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 2\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 3\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 4\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 5\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 6\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Hill, Dwight Shugard, Don Fishburn, John Keutzer, Kurt Algorithms and Techniques for VLSI Layout Synthesis Engineering Electrical Engineering Electrical engineering Design (DE-588)4011510-0 gnd Entwurf (DE-588)4121208-3 gnd Datenstruktur (DE-588)4011146-5 gnd VLSI (DE-588)4117388-0 gnd Algorithmus (DE-588)4001183-5 gnd Layout Mikroelektronik (DE-588)4264372-7 gnd Geometrische Ordnung (DE-588)4156719-5 gnd |
| subject_GND | (DE-588)4011510-0 (DE-588)4121208-3 (DE-588)4011146-5 (DE-588)4117388-0 (DE-588)4001183-5 (DE-588)4264372-7 (DE-588)4156719-5 |
| title | Algorithms and Techniques for VLSI Layout Synthesis |
| title_auth | Algorithms and Techniques for VLSI Layout Synthesis |
| title_exact_search | Algorithms and Techniques for VLSI Layout Synthesis |
| title_full | Algorithms and Techniques for VLSI Layout Synthesis by Dwight Hill, Don Shugard, John Fishburn, Kurt Keutzer |
| title_fullStr | Algorithms and Techniques for VLSI Layout Synthesis by Dwight Hill, Don Shugard, John Fishburn, Kurt Keutzer |
| title_full_unstemmed | Algorithms and Techniques for VLSI Layout Synthesis by Dwight Hill, Don Shugard, John Fishburn, Kurt Keutzer |
| title_short | Algorithms and Techniques for VLSI Layout Synthesis |
| title_sort | algorithms and techniques for vlsi layout synthesis |
| topic | Engineering Electrical Engineering Electrical engineering Design (DE-588)4011510-0 gnd Entwurf (DE-588)4121208-3 gnd Datenstruktur (DE-588)4011146-5 gnd VLSI (DE-588)4117388-0 gnd Algorithmus (DE-588)4001183-5 gnd Layout Mikroelektronik (DE-588)4264372-7 gnd Geometrische Ordnung (DE-588)4156719-5 gnd |
| topic_facet | Engineering Electrical Engineering Electrical engineering Design Entwurf Datenstruktur VLSI Algorithmus Layout Mikroelektronik Geometrische Ordnung |
| url | https://doi.org/10.1007/978-1-4613-1707-4 |
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