Summary Based on the experiences of past designs and the outcome of recent studies in the comparisons of low-level image processing architectures, a pipelined system for real­ time low-image processing has been designed and realized in CMOS technology. To minimize design pitfalls, a study was perfor...

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Bibliographische Detailangaben

1. Verfasser:	Jonker, Petrus Paulus (VerfasserIn)
Format:	Elektronisch E-Book
Sprache:	English
Veröffentlicht:	Boston, MA Springer US 1992
Schlagworte:	Engineering Circuits and Systems Image Processing and Computer Vision Electrical Engineering Signal, Image and Speech Processing Image processing Electrical engineering Electronic circuits Mathematische Morphologie Bildverarbeitung Hochschulschrift
Online-Zugang:	BTU01 URL des Erstveröffentlichers
Zusammenfassung:	Summary Based on the experiences of past designs and the outcome of recent studies in the comparisons of low-level image processing architectures, a pipelined system for real­ time low-image processing has been designed and realized in CMOS technology. To minimize design pitfalls, a study was performed to the details of the design solutions that have been found in embodimentsof the three main architectural groups of image processing; the Square Processor Arrays, the Linear Processor Arrays and the Pipelines. This is reflected in a theoretical model. As the design is based on bitplane-wise processing of images, research was performed on the principles ofCellularLogic Processing of two dimensional images. of binary A methodology has been developed that is based on the transformation images using sets of Hit-or-Miss masks. This method appeared to be extendable to higher dimensional images. A theoretical model for the generation of break-point conditions in high dimensional images has been developed, and applied up to dimension three
Beschreibung:	1 Online-Ressource (V, 297 p)
ISBN:	9781461528043
DOI:	10.1007/978-1-4615-2804-3