Morphological Image Processing: Architecture and VLSI design:
Summary Based on the experiences of past designs and the outcome of recent studies in the comparisons of low-level image processing architectures, a pipelined system for real time low-image processing has been designed and realized in CMOS technology. To minimize design pitfalls, a study was perfor...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Boston, MA
Springer US
1992
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| Schlagworte: | |
| Online-Zugang: | BTU01 URL des Erstveröffentlichers |
| Zusammenfassung: | Summary Based on the experiences of past designs and the outcome of recent studies in the comparisons of low-level image processing architectures, a pipelined system for real time low-image processing has been designed and realized in CMOS technology. To minimize design pitfalls, a study was performed to the details of the design solutions that have been found in embodimentsof the three main architectural groups of image processing; the Square Processor Arrays, the Linear Processor Arrays and the Pipelines. This is reflected in a theoretical model. As the design is based on bitplane-wise processing of images, research was performed on the principles ofCellularLogic Processing of two dimensional images. of binary A methodology has been developed that is based on the transformation images using sets of Hit-or-Miss masks. This method appeared to be extendable to higher dimensional images. A theoretical model for the generation of break-point conditions in high dimensional images has been developed, and applied up to dimension three |
| Beschreibung: | 1 Online-Ressource (V, 297 p) |
| ISBN: | 9781461528043 |
| DOI: | 10.1007/978-1-4615-2804-3 |
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| spelling | Jonker, Petrus Paulus Verfasser aut Morphological Image Processing: Architecture and VLSI design by Petrus Paulus Jonker Boston, MA Springer US 1992 1 Online-Ressource (V, 297 p) txt rdacontent c rdamedia cr rdacarrier Summary Based on the experiences of past designs and the outcome of recent studies in the comparisons of low-level image processing architectures, a pipelined system for real time low-image processing has been designed and realized in CMOS technology. To minimize design pitfalls, a study was performed to the details of the design solutions that have been found in embodimentsof the three main architectural groups of image processing; the Square Processor Arrays, the Linear Processor Arrays and the Pipelines. This is reflected in a theoretical model. As the design is based on bitplane-wise processing of images, research was performed on the principles ofCellularLogic Processing of two dimensional images. of binary A methodology has been developed that is based on the transformation images using sets of Hit-or-Miss masks. This method appeared to be extendable to higher dimensional images. A theoretical model for the generation of break-point conditions in high dimensional images has been developed, and applied up to dimension three Engineering Circuits and Systems Image Processing and Computer Vision Electrical Engineering Signal, Image and Speech Processing Image processing Electrical engineering Electronic circuits Mathematische Morphologie (DE-588)4505783-7 gnd rswk-swf Bildverarbeitung (DE-588)4006684-8 gnd rswk-swf 1\p (DE-588)4113937-9 Hochschulschrift gnd-content Bildverarbeitung (DE-588)4006684-8 s Mathematische Morphologie (DE-588)4505783-7 s 2\p DE-604 Erscheint auch als Druck-Ausgabe 9789020127669 https://doi.org/10.1007/978-1-4615-2804-3 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 2\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Jonker, Petrus Paulus Morphological Image Processing: Architecture and VLSI design Engineering Circuits and Systems Image Processing and Computer Vision Electrical Engineering Signal, Image and Speech Processing Image processing Electrical engineering Electronic circuits Mathematische Morphologie (DE-588)4505783-7 gnd Bildverarbeitung (DE-588)4006684-8 gnd |
| subject_GND | (DE-588)4505783-7 (DE-588)4006684-8 (DE-588)4113937-9 |
| title | Morphological Image Processing: Architecture and VLSI design |
| title_auth | Morphological Image Processing: Architecture and VLSI design |
| title_exact_search | Morphological Image Processing: Architecture and VLSI design |
| title_full | Morphological Image Processing: Architecture and VLSI design by Petrus Paulus Jonker |
| title_fullStr | Morphological Image Processing: Architecture and VLSI design by Petrus Paulus Jonker |
| title_full_unstemmed | Morphological Image Processing: Architecture and VLSI design by Petrus Paulus Jonker |
| title_short | Morphological Image Processing: Architecture and VLSI design |
| title_sort | morphological image processing architecture and vlsi design |
| topic | Engineering Circuits and Systems Image Processing and Computer Vision Electrical Engineering Signal, Image and Speech Processing Image processing Electrical engineering Electronic circuits Mathematische Morphologie (DE-588)4505783-7 gnd Bildverarbeitung (DE-588)4006684-8 gnd |
| topic_facet | Engineering Circuits and Systems Image Processing and Computer Vision Electrical Engineering Signal, Image and Speech Processing Image processing Electrical engineering Electronic circuits Mathematische Morphologie Bildverarbeitung Hochschulschrift |
| url | https://doi.org/10.1007/978-1-4615-2804-3 |
| work_keys_str_mv | AT jonkerpetruspaulus morphologicalimageprocessingarchitectureandvlsidesign |