The MIPS-X RISC Microprocessor:
The first Stanford MIPS project started as a special graduate course in 1981. That project produced working silicon in 1983 and a prototype for running small programs in early 1984. After that, we declared it a success and decided to move on to the next project-MIPS-X. This book is the final and com...
Gespeichert in:
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| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Boston, MA
Springer US
1989
|
| Schriftenreihe: | The Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing
81 |
| Schlagworte: | |
| Online-Zugang: | BTU01 Volltext |
| Zusammenfassung: | The first Stanford MIPS project started as a special graduate course in 1981. That project produced working silicon in 1983 and a prototype for running small programs in early 1984. After that, we declared it a success and decided to move on to the next project-MIPS-X. This book is the final and complete word on MIPS-X. The initial design of MIPS-X was formulated in 1984 beginning in the Spring. At that time, we were unsure that RISe technology was going to have the industrial impact that we felt it should. We also knew of a number of architectural and implementation flaws in the Stanford MIPS machine. We believed that a new processor could achieve a performance level of over 10 times a VAX 11/780, and that a microprocessor of this performance level would convince academic skeptics of the value of the RISe approach. We were concerned that the flaws in the original RISe design might overshadow the core ideas, or that attempts to industrialize the technology would repeat the mistakes of the first generation designs. MIPS-X was targeted to eliminate the flaws in the first generation de signs and to boost the performance level by over a factor of five |
| Beschreibung: | 1 Online-Ressource (XXIV, 232 p) |
| ISBN: | 9781475767629 |
| DOI: | 10.1007/978-1-4757-6762-9 |
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| id | DE-604.BV045186635 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T08:10:57Z |
| institution | BVB |
| isbn | 9781475767629 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030575812 |
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| physical | 1 Online-Ressource (XXIV, 232 p) |
| psigel | ZDB-2-ENG ZDB-2-ENG_Archiv ZDB-2-ENG ZDB-2-ENG_Archiv |
| publishDate | 1989 |
| publishDateSearch | 1989 |
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| publisher | Springer US |
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| series2 | The Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing |
| spelling | The MIPS-X RISC Microprocessor edited by Paul Chow Boston, MA Springer US 1989 1 Online-Ressource (XXIV, 232 p) txt rdacontent c rdamedia cr rdacarrier The Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing 81 The first Stanford MIPS project started as a special graduate course in 1981. That project produced working silicon in 1983 and a prototype for running small programs in early 1984. After that, we declared it a success and decided to move on to the next project-MIPS-X. This book is the final and complete word on MIPS-X. The initial design of MIPS-X was formulated in 1984 beginning in the Spring. At that time, we were unsure that RISe technology was going to have the industrial impact that we felt it should. We also knew of a number of architectural and implementation flaws in the Stanford MIPS machine. We believed that a new processor could achieve a performance level of over 10 times a VAX 11/780, and that a microprocessor of this performance level would convince academic skeptics of the value of the RISe approach. We were concerned that the flaws in the original RISe design might overshadow the core ideas, or that attempts to industrialize the technology would repeat the mistakes of the first generation designs. MIPS-X was targeted to eliminate the flaws in the first generation de signs and to boost the performance level by over a factor of five Computer Science Processor Architectures Electrical Engineering Computer science Microprocessors Electrical engineering Chow, Paul edt Erscheint auch als Druck-Ausgabe 9781441951199 https://doi.org/10.1007/978-1-4757-6762-9 Verlag URL des Erstveröffentlichers Volltext |
| spellingShingle | The MIPS-X RISC Microprocessor Computer Science Processor Architectures Electrical Engineering Computer science Microprocessors Electrical engineering |
| title | The MIPS-X RISC Microprocessor |
| title_auth | The MIPS-X RISC Microprocessor |
| title_exact_search | The MIPS-X RISC Microprocessor |
| title_full | The MIPS-X RISC Microprocessor edited by Paul Chow |
| title_fullStr | The MIPS-X RISC Microprocessor edited by Paul Chow |
| title_full_unstemmed | The MIPS-X RISC Microprocessor edited by Paul Chow |
| title_short | The MIPS-X RISC Microprocessor |
| title_sort | the mips x risc microprocessor |
| topic | Computer Science Processor Architectures Electrical Engineering Computer science Microprocessors Electrical engineering |
| topic_facet | Computer Science Processor Architectures Electrical Engineering Computer science Microprocessors Electrical engineering |
| url | https://doi.org/10.1007/978-1-4757-6762-9 |
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