Multi-Chip Module Test Strategies:
MCMs today consist of complex and dense VLSI devices mounted into packages that allow little physical access to internal nodes. The complexity and cost associated with their test and diagnosis are major obstacles to their use. Multi-Chip Module Test Strategies presents state-of-the-art test strategi...
Gespeichert in:
| Weitere Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Boston, MA
Springer US
1997
|
| Schriftenreihe: | Frontiers in Electronic Testing
7 |
| Schlagworte: | |
| Online-Zugang: | BTU01 Volltext |
| Zusammenfassung: | MCMs today consist of complex and dense VLSI devices mounted into packages that allow little physical access to internal nodes. The complexity and cost associated with their test and diagnosis are major obstacles to their use. Multi-Chip Module Test Strategies presents state-of-the-art test strategies for MCMs. This volume of original research is designed for engineers interested in practical implementations of MCM test solutions and for designers looking for leading edge test and design-for-testability solutions for their next designs. Multi-Chip Module Test Strategies consists of eight contributions by leading researchers. It is designed to provide a comprehensive and well-balanced coverage of the MCM test domain. Multi-Chip Module Test Strategies has also been published as a special issue of the Journal of Electronic Testing: Theory and Applications (JETTA, Volume 10, Numbers 1 and 2) |
| Beschreibung: | 1 Online-Ressource (167 p) |
| ISBN: | 9781461561071 |
| DOI: | 10.1007/978-1-4615-6107-1 |
Internformat
MARC
| LEADER | 00000nmm a2200000zcb4500 | ||
|---|---|---|---|
| 001 | BV045186533 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | cr|uuu---uuuuu | ||
| 008 | 180912s1997 |||| o||u| ||||||eng d | ||
| 020 | |a 9781461561071 |9 978-1-4615-6107-1 | ||
| 024 | 7 | |a 10.1007/978-1-4615-6107-1 |2 doi | |
| 035 | |a (ZDB-2-ENG)978-1-4615-6107-1 | ||
| 035 | |a (OCoLC)1053824733 | ||
| 035 | |a (DE-599)BVBBV045186533 | ||
| 040 | |a DE-604 |b ger |e aacr | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-634 | ||
| 082 | 0 | |a 621.3815 |2 23 | |
| 245 | 1 | 0 | |a Multi-Chip Module Test Strategies |c edited by Yervant Zorian |
| 264 | 1 | |a Boston, MA |b Springer US |c 1997 | |
| 300 | |a 1 Online-Ressource (167 p) | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 490 | 0 | |a Frontiers in Electronic Testing |v 7 | |
| 520 | |a MCMs today consist of complex and dense VLSI devices mounted into packages that allow little physical access to internal nodes. The complexity and cost associated with their test and diagnosis are major obstacles to their use. Multi-Chip Module Test Strategies presents state-of-the-art test strategies for MCMs. This volume of original research is designed for engineers interested in practical implementations of MCM test solutions and for designers looking for leading edge test and design-for-testability solutions for their next designs. Multi-Chip Module Test Strategies consists of eight contributions by leading researchers. It is designed to provide a comprehensive and well-balanced coverage of the MCM test domain. Multi-Chip Module Test Strategies has also been published as a special issue of the Journal of Electronic Testing: Theory and Applications (JETTA, Volume 10, Numbers 1 and 2) | ||
| 650 | 4 | |a Engineering | |
| 650 | 4 | |a Circuits and Systems | |
| 650 | 4 | |a Electrical Engineering | |
| 650 | 4 | |a Engineering | |
| 650 | 4 | |a Electrical engineering | |
| 650 | 4 | |a Electronic circuits | |
| 700 | 1 | |a Zorian, Yervant |4 edt | |
| 776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9781461377986 |
| 856 | 4 | 0 | |u https://doi.org/10.1007/978-1-4615-6107-1 |x Verlag |z URL des Erstveröffentlichers |3 Volltext |
| 912 | |a ZDB-2-ENG | ||
| 940 | 1 | |q ZDB-2-ENG_Archiv | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-030575710 | ||
| 966 | e | |u https://doi.org/10.1007/978-1-4615-6107-1 |l BTU01 |p ZDB-2-ENG |q ZDB-2-ENG_Archiv |x Verlag |3 Volltext | |
Datensatz im Suchindex
| _version_ | 1804178877629595648 |
|---|---|
| any_adam_object | |
| author2 | Zorian, Yervant |
| author2_role | edt |
| author2_variant | y z yz |
| author_facet | Zorian, Yervant |
| building | Verbundindex |
| bvnumber | BV045186533 |
| collection | ZDB-2-ENG |
| ctrlnum | (ZDB-2-ENG)978-1-4615-6107-1 (OCoLC)1053824733 (DE-599)BVBBV045186533 |
| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| doi_str_mv | 10.1007/978-1-4615-6107-1 |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02362nmm a2200445zcb4500</leader><controlfield tag="001">BV045186533</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">180912s1997 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781461561071</subfield><subfield code="9">978-1-4615-6107-1</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/978-1-4615-6107-1</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-2-ENG)978-1-4615-6107-1</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)1053824733</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV045186533</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-634</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815</subfield><subfield code="2">23</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Multi-Chip Module Test Strategies</subfield><subfield code="c">edited by Yervant Zorian</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston, MA</subfield><subfield code="b">Springer US</subfield><subfield code="c">1997</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (167 p)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">Frontiers in Electronic Testing</subfield><subfield code="v">7</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">MCMs today consist of complex and dense VLSI devices mounted into packages that allow little physical access to internal nodes. The complexity and cost associated with their test and diagnosis are major obstacles to their use. Multi-Chip Module Test Strategies presents state-of-the-art test strategies for MCMs. This volume of original research is designed for engineers interested in practical implementations of MCM test solutions and for designers looking for leading edge test and design-for-testability solutions for their next designs. Multi-Chip Module Test Strategies consists of eight contributions by leading researchers. It is designed to provide a comprehensive and well-balanced coverage of the MCM test domain. Multi-Chip Module Test Strategies has also been published as a special issue of the Journal of Electronic Testing: Theory and Applications (JETTA, Volume 10, Numbers 1 and 2)</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits and Systems</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic circuits</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Zorian, Yervant</subfield><subfield code="4">edt</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9781461377986</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://doi.org/10.1007/978-1-4615-6107-1</subfield><subfield code="x">Verlag</subfield><subfield code="z">URL des Erstveröffentlichers</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-ENG</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">ZDB-2-ENG_Archiv</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-030575710</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-4615-6107-1</subfield><subfield code="l">BTU01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="q">ZDB-2-ENG_Archiv</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
| id | DE-604.BV045186533 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T08:10:57Z |
| institution | BVB |
| isbn | 9781461561071 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030575710 |
| oclc_num | 1053824733 |
| open_access_boolean | |
| owner | DE-634 |
| owner_facet | DE-634 |
| physical | 1 Online-Ressource (167 p) |
| psigel | ZDB-2-ENG ZDB-2-ENG_Archiv ZDB-2-ENG ZDB-2-ENG_Archiv |
| publishDate | 1997 |
| publishDateSearch | 1997 |
| publishDateSort | 1997 |
| publisher | Springer US |
| record_format | marc |
| series2 | Frontiers in Electronic Testing |
| spelling | Multi-Chip Module Test Strategies edited by Yervant Zorian Boston, MA Springer US 1997 1 Online-Ressource (167 p) txt rdacontent c rdamedia cr rdacarrier Frontiers in Electronic Testing 7 MCMs today consist of complex and dense VLSI devices mounted into packages that allow little physical access to internal nodes. The complexity and cost associated with their test and diagnosis are major obstacles to their use. Multi-Chip Module Test Strategies presents state-of-the-art test strategies for MCMs. This volume of original research is designed for engineers interested in practical implementations of MCM test solutions and for designers looking for leading edge test and design-for-testability solutions for their next designs. Multi-Chip Module Test Strategies consists of eight contributions by leading researchers. It is designed to provide a comprehensive and well-balanced coverage of the MCM test domain. Multi-Chip Module Test Strategies has also been published as a special issue of the Journal of Electronic Testing: Theory and Applications (JETTA, Volume 10, Numbers 1 and 2) Engineering Circuits and Systems Electrical Engineering Electrical engineering Electronic circuits Zorian, Yervant edt Erscheint auch als Druck-Ausgabe 9781461377986 https://doi.org/10.1007/978-1-4615-6107-1 Verlag URL des Erstveröffentlichers Volltext |
| spellingShingle | Multi-Chip Module Test Strategies Engineering Circuits and Systems Electrical Engineering Electrical engineering Electronic circuits |
| title | Multi-Chip Module Test Strategies |
| title_auth | Multi-Chip Module Test Strategies |
| title_exact_search | Multi-Chip Module Test Strategies |
| title_full | Multi-Chip Module Test Strategies edited by Yervant Zorian |
| title_fullStr | Multi-Chip Module Test Strategies edited by Yervant Zorian |
| title_full_unstemmed | Multi-Chip Module Test Strategies edited by Yervant Zorian |
| title_short | Multi-Chip Module Test Strategies |
| title_sort | multi chip module test strategies |
| topic | Engineering Circuits and Systems Electrical Engineering Electrical engineering Electronic circuits |
| topic_facet | Engineering Circuits and Systems Electrical Engineering Electrical engineering Electronic circuits |
| url | https://doi.org/10.1007/978-1-4615-6107-1 |
| work_keys_str_mv | AT zorianyervant multichipmoduleteststrategies |