Reuse Techniques for VLSI Design:
Reuse Techniques for VLSI Design is a reflection on the current state of the art in design reuse for microelectronic systems. To that end, it is the first book to garner the input of leading experts from both research and application areas. These experts document herein not only their more mature ap...
Gespeichert in:
Weitere Verfasser: | , |
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Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Boston, MA
Springer US
1999
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Schlagworte: | |
Online-Zugang: | BTU01 Volltext |
Zusammenfassung: | Reuse Techniques for VLSI Design is a reflection on the current state of the art in design reuse for microelectronic systems. To that end, it is the first book to garner the input of leading experts from both research and application areas. These experts document herein not only their more mature approaches, but also their latest research results. Firstly, it sets out the background and support from international organisations that enforce System-on-a-Chip (SoC) design by reuse- oriented methodologies. This overview is followed by a number of technical presentations covering different requirements of the reuse domain. These are presented from different points of view, i.e., IP provider, IP user, designer, isolated reuse, intra-company or inter-company reuse. More general systems or case studies, e.g., metrics, are followed by comprehensive reuse systems, e.g., reuse management systems partly including business models. Since design reuse must not be restricted to digital components, mixed- signal and analog reuse approaches are also presented. In parallel to the digital domain, this area covers research in reuse database design. Design verification and legal aspects are two important topics that are closely related to the realization of design reuse. These hot topics are covered by presentations that finalize the survey of outstanding research, development and application of design reuse for SoC design. Reuse Techniques for VLSI Design is an invaluable reference for researchers and engineers involved in VLSI/ASIC design |
Beschreibung: | 1 Online-Ressource (XIV, 153 p) |
ISBN: | 9781461551591 |
DOI: | 10.1007/978-1-4615-5159-1 |
Internformat
MARC
LEADER | 00000nmm a2200000zc 4500 | ||
---|---|---|---|
001 | BV045185961 | ||
003 | DE-604 | ||
005 | 00000000000000.0 | ||
007 | cr|uuu---uuuuu | ||
008 | 180912s1999 |||| o||u| ||||||eng d | ||
020 | |a 9781461551591 |9 978-1-4615-5159-1 | ||
024 | 7 | |a 10.1007/978-1-4615-5159-1 |2 doi | |
035 | |a (ZDB-2-ENG)978-1-4615-5159-1 | ||
035 | |a (OCoLC)1184262938 | ||
035 | |a (DE-599)BVBBV045185961 | ||
040 | |a DE-604 |b ger |e aacr | ||
041 | 0 | |a eng | |
049 | |a DE-634 | ||
082 | 0 | |a 621.381 |2 23 | |
245 | 1 | 0 | |a Reuse Techniques for VLSI Design |c edited by Ralf Seepold, Arno Kunzmann |
264 | 1 | |a Boston, MA |b Springer US |c 1999 | |
300 | |a 1 Online-Ressource (XIV, 153 p) | ||
336 | |b txt |2 rdacontent | ||
337 | |b c |2 rdamedia | ||
338 | |b cr |2 rdacarrier | ||
520 | |a Reuse Techniques for VLSI Design is a reflection on the current state of the art in design reuse for microelectronic systems. To that end, it is the first book to garner the input of leading experts from both research and application areas. These experts document herein not only their more mature approaches, but also their latest research results. Firstly, it sets out the background and support from international organisations that enforce System-on-a-Chip (SoC) design by reuse- oriented methodologies. This overview is followed by a number of technical presentations covering different requirements of the reuse domain. These are presented from different points of view, i.e., IP provider, IP user, designer, isolated reuse, intra-company or inter-company reuse. More general systems or case studies, e.g., metrics, are followed by comprehensive reuse systems, e.g., reuse management systems partly including business models. Since design reuse must not be restricted to digital components, mixed- signal and analog reuse approaches are also presented. In parallel to the digital domain, this area covers research in reuse database design. Design verification and legal aspects are two important topics that are closely related to the realization of design reuse. These hot topics are covered by presentations that finalize the survey of outstanding research, development and application of design reuse for SoC design. Reuse Techniques for VLSI Design is an invaluable reference for researchers and engineers involved in VLSI/ASIC design | ||
650 | 4 | |a Engineering | |
650 | 4 | |a Electronics and Microelectronics, Instrumentation | |
650 | 4 | |a Circuits and Systems | |
650 | 4 | |a Electrical Engineering | |
650 | 4 | |a Computer-Aided Engineering (CAD, CAE) and Design | |
650 | 4 | |a Computer Hardware | |
650 | 4 | |a Engineering | |
650 | 4 | |a Computer hardware | |
650 | 4 | |a Computer-aided engineering | |
650 | 4 | |a Electrical engineering | |
650 | 4 | |a Electronics | |
650 | 4 | |a Microelectronics | |
650 | 4 | |a Electronic circuits | |
650 | 0 | 7 | |a Softwarewiederverwendung |0 (DE-588)4225989-7 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
689 | 0 | 1 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |D s |
689 | 0 | 2 | |a Softwarewiederverwendung |0 (DE-588)4225989-7 |D s |
689 | 0 | |8 1\p |5 DE-604 | |
700 | 1 | |a Seepold, Ralf |4 edt | |
700 | 1 | |a Kunzmann, Arno |4 edt | |
776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9781461373490 |
856 | 4 | 0 | |u https://doi.org/10.1007/978-1-4615-5159-1 |x Verlag |z URL des Erstveröffentlichers |3 Volltext |
912 | |a ZDB-2-ENG | ||
940 | 1 | |q ZDB-2-ENG_Archiv | |
999 | |a oai:aleph.bib-bvb.de:BVB01-030575138 | ||
883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
966 | e | |u https://doi.org/10.1007/978-1-4615-5159-1 |l BTU01 |p ZDB-2-ENG |q ZDB-2-ENG_Archiv |x Verlag |3 Volltext |
Datensatz im Suchindex
_version_ | 1804178876418490368 |
---|---|
any_adam_object | |
author2 | Seepold, Ralf Kunzmann, Arno |
author2_role | edt edt |
author2_variant | r s rs a k ak |
author_facet | Seepold, Ralf Kunzmann, Arno |
building | Verbundindex |
bvnumber | BV045185961 |
collection | ZDB-2-ENG |
ctrlnum | (ZDB-2-ENG)978-1-4615-5159-1 (OCoLC)1184262938 (DE-599)BVBBV045185961 |
dewey-full | 621.381 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.381 |
dewey-search | 621.381 |
dewey-sort | 3621.381 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
doi_str_mv | 10.1007/978-1-4615-5159-1 |
format | Electronic eBook |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>03782nmm a2200625zc 4500</leader><controlfield tag="001">BV045185961</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">180912s1999 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781461551591</subfield><subfield code="9">978-1-4615-5159-1</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/978-1-4615-5159-1</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-2-ENG)978-1-4615-5159-1</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)1184262938</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV045185961</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-634</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.381</subfield><subfield code="2">23</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Reuse Techniques for VLSI Design</subfield><subfield code="c">edited by Ralf Seepold, Arno Kunzmann</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston, MA</subfield><subfield code="b">Springer US</subfield><subfield code="c">1999</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (XIV, 153 p)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">Reuse Techniques for VLSI Design is a reflection on the current state of the art in design reuse for microelectronic systems. To that end, it is the first book to garner the input of leading experts from both research and application areas. These experts document herein not only their more mature approaches, but also their latest research results. Firstly, it sets out the background and support from international organisations that enforce System-on-a-Chip (SoC) design by reuse- oriented methodologies. This overview is followed by a number of technical presentations covering different requirements of the reuse domain. These are presented from different points of view, i.e., IP provider, IP user, designer, isolated reuse, intra-company or inter-company reuse. More general systems or case studies, e.g., metrics, are followed by comprehensive reuse systems, e.g., reuse management systems partly including business models. Since design reuse must not be restricted to digital components, mixed- signal and analog reuse approaches are also presented. In parallel to the digital domain, this area covers research in reuse database design. Design verification and legal aspects are two important topics that are closely related to the realization of design reuse. These hot topics are covered by presentations that finalize the survey of outstanding research, development and application of design reuse for SoC design. Reuse Techniques for VLSI Design is an invaluable reference for researchers and engineers involved in VLSI/ASIC design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronics and Microelectronics, Instrumentation</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits and Systems</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer-Aided Engineering (CAD, CAE) and Design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer Hardware</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer hardware</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer-aided engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronics</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Microelectronics</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic circuits</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Softwarewiederverwendung</subfield><subfield code="0">(DE-588)4225989-7</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">Softwarewiederverwendung</subfield><subfield code="0">(DE-588)4225989-7</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Seepold, Ralf</subfield><subfield code="4">edt</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Kunzmann, Arno</subfield><subfield code="4">edt</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9781461373490</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://doi.org/10.1007/978-1-4615-5159-1</subfield><subfield code="x">Verlag</subfield><subfield code="z">URL des Erstveröffentlichers</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-ENG</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">ZDB-2-ENG_Archiv</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-030575138</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-4615-5159-1</subfield><subfield code="l">BTU01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="q">ZDB-2-ENG_Archiv</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
id | DE-604.BV045185961 |
illustrated | Not Illustrated |
indexdate | 2024-07-10T08:10:56Z |
institution | BVB |
isbn | 9781461551591 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030575138 |
oclc_num | 1184262938 |
open_access_boolean | |
owner | DE-634 |
owner_facet | DE-634 |
physical | 1 Online-Ressource (XIV, 153 p) |
psigel | ZDB-2-ENG ZDB-2-ENG_Archiv ZDB-2-ENG ZDB-2-ENG_Archiv |
publishDate | 1999 |
publishDateSearch | 1999 |
publishDateSort | 1999 |
publisher | Springer US |
record_format | marc |
spelling | Reuse Techniques for VLSI Design edited by Ralf Seepold, Arno Kunzmann Boston, MA Springer US 1999 1 Online-Ressource (XIV, 153 p) txt rdacontent c rdamedia cr rdacarrier Reuse Techniques for VLSI Design is a reflection on the current state of the art in design reuse for microelectronic systems. To that end, it is the first book to garner the input of leading experts from both research and application areas. These experts document herein not only their more mature approaches, but also their latest research results. Firstly, it sets out the background and support from international organisations that enforce System-on-a-Chip (SoC) design by reuse- oriented methodologies. This overview is followed by a number of technical presentations covering different requirements of the reuse domain. These are presented from different points of view, i.e., IP provider, IP user, designer, isolated reuse, intra-company or inter-company reuse. More general systems or case studies, e.g., metrics, are followed by comprehensive reuse systems, e.g., reuse management systems partly including business models. Since design reuse must not be restricted to digital components, mixed- signal and analog reuse approaches are also presented. In parallel to the digital domain, this area covers research in reuse database design. Design verification and legal aspects are two important topics that are closely related to the realization of design reuse. These hot topics are covered by presentations that finalize the survey of outstanding research, development and application of design reuse for SoC design. Reuse Techniques for VLSI Design is an invaluable reference for researchers and engineers involved in VLSI/ASIC design Engineering Electronics and Microelectronics, Instrumentation Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer Hardware Computer hardware Computer-aided engineering Electrical engineering Electronics Microelectronics Electronic circuits Softwarewiederverwendung (DE-588)4225989-7 gnd rswk-swf Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf VLSI (DE-588)4117388-0 s Schaltungsentwurf (DE-588)4179389-4 s Softwarewiederverwendung (DE-588)4225989-7 s 1\p DE-604 Seepold, Ralf edt Kunzmann, Arno edt Erscheint auch als Druck-Ausgabe 9781461373490 https://doi.org/10.1007/978-1-4615-5159-1 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Reuse Techniques for VLSI Design Engineering Electronics and Microelectronics, Instrumentation Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer Hardware Computer hardware Computer-aided engineering Electrical engineering Electronics Microelectronics Electronic circuits Softwarewiederverwendung (DE-588)4225989-7 gnd Schaltungsentwurf (DE-588)4179389-4 gnd VLSI (DE-588)4117388-0 gnd |
subject_GND | (DE-588)4225989-7 (DE-588)4179389-4 (DE-588)4117388-0 |
title | Reuse Techniques for VLSI Design |
title_auth | Reuse Techniques for VLSI Design |
title_exact_search | Reuse Techniques for VLSI Design |
title_full | Reuse Techniques for VLSI Design edited by Ralf Seepold, Arno Kunzmann |
title_fullStr | Reuse Techniques for VLSI Design edited by Ralf Seepold, Arno Kunzmann |
title_full_unstemmed | Reuse Techniques for VLSI Design edited by Ralf Seepold, Arno Kunzmann |
title_short | Reuse Techniques for VLSI Design |
title_sort | reuse techniques for vlsi design |
topic | Engineering Electronics and Microelectronics, Instrumentation Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer Hardware Computer hardware Computer-aided engineering Electrical engineering Electronics Microelectronics Electronic circuits Softwarewiederverwendung (DE-588)4225989-7 gnd Schaltungsentwurf (DE-588)4179389-4 gnd VLSI (DE-588)4117388-0 gnd |
topic_facet | Engineering Electronics and Microelectronics, Instrumentation Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer Hardware Computer hardware Computer-aided engineering Electrical engineering Electronics Microelectronics Electronic circuits Softwarewiederverwendung Schaltungsentwurf VLSI |
url | https://doi.org/10.1007/978-1-4615-5159-1 |
work_keys_str_mv | AT seepoldralf reusetechniquesforvlsidesign AT kunzmannarno reusetechniquesforvlsidesign |