Microcomputer Systems Using the STE Bus:
The IEEE approved STE bus is the newest bus standard to be introduced to ensure efficient and reliable communication between microprocessors and related devices. After introducing bus systems, the author gives a survey of buses. This is followed by detailed interfacing of slave devices to STE, with...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
London
Macmillan Education UK
1989
|
Schriftenreihe: | Computer Science Series
|
Schlagworte: | |
Online-Zugang: | BTU01 URL des Erstveröffentlichers |
Zusammenfassung: | The IEEE approved STE bus is the newest bus standard to be introduced to ensure efficient and reliable communication between microprocessors and related devices. After introducing bus systems, the author gives a survey of buses. This is followed by detailed interfacing of slave devices to STE, with practical circuits. Other typical slave devices are then discussed. The various ways in which one or many microprocessors and other bus masters may be connected to STE are described. Testing, software, practical aspects of digital circuitry and technical requirements of the STE specification are then considered. Finally, algorithms for the design of sequential logic circuits are presented |
Beschreibung: | 1 Online-Ressource (XI, 218 p) |
ISBN: | 9781349109722 |
DOI: | 10.1007/978-1-349-10972-2 |
Internformat
MARC
LEADER | 00000nmm a2200000zc 4500 | ||
---|---|---|---|
001 | BV045185660 | ||
003 | DE-604 | ||
005 | 00000000000000.0 | ||
007 | cr|uuu---uuuuu | ||
008 | 180912s1989 |||| o||u| ||||||eng d | ||
020 | |a 9781349109722 |9 978-1-349-10972-2 | ||
024 | 7 | |a 10.1007/978-1-349-10972-2 |2 doi | |
035 | |a (ZDB-2-ENG)978-1-349-10972-2 | ||
035 | |a (OCoLC)1053844984 | ||
035 | |a (DE-599)BVBBV045185660 | ||
040 | |a DE-604 |b ger |e aacr | ||
041 | 0 | |a eng | |
049 | |a DE-634 | ||
082 | 0 | |a 004.6 |2 23 | |
100 | 1 | |a Mitchell, R. J. |e Verfasser |4 aut | |
245 | 1 | 0 | |a Microcomputer Systems Using the STE Bus |c by R. J. Mitchell |
264 | 1 | |a London |b Macmillan Education UK |c 1989 | |
300 | |a 1 Online-Ressource (XI, 218 p) | ||
336 | |b txt |2 rdacontent | ||
337 | |b c |2 rdamedia | ||
338 | |b cr |2 rdacarrier | ||
490 | 0 | |a Computer Science Series | |
520 | |a The IEEE approved STE bus is the newest bus standard to be introduced to ensure efficient and reliable communication between microprocessors and related devices. After introducing bus systems, the author gives a survey of buses. This is followed by detailed interfacing of slave devices to STE, with practical circuits. Other typical slave devices are then discussed. The various ways in which one or many microprocessors and other bus masters may be connected to STE are described. Testing, software, practical aspects of digital circuitry and technical requirements of the STE specification are then considered. Finally, algorithms for the design of sequential logic circuits are presented | ||
650 | 4 | |a Computer Systems Organization and Communication Networks | |
650 | 4 | |a Computer System Implementation | |
650 | 4 | |a Computer network architectures | |
776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9780333496497 |
776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9781349109739 |
856 | 4 | 0 | |u https://doi.org/10.1007/978-1-349-10972-2 |x Verlag |z URL des Erstveröffentlichers |3 Volltext |
912 | |a ZDB-2-ENG | ||
940 | 1 | |q ZDB-2-ENG_Archiv | |
999 | |a oai:aleph.bib-bvb.de:BVB01-030574838 | ||
966 | e | |u https://doi.org/10.1007/978-1-349-10972-2 |l BTU01 |p ZDB-2-ENG |q ZDB-2-ENG_Archiv |x Verlag |3 Volltext |
Datensatz im Suchindex
_version_ | 1804178875799830528 |
---|---|
any_adam_object | |
author | Mitchell, R. J. |
author_facet | Mitchell, R. J. |
author_role | aut |
author_sort | Mitchell, R. J. |
author_variant | r j m rj rjm |
building | Verbundindex |
bvnumber | BV045185660 |
collection | ZDB-2-ENG |
ctrlnum | (ZDB-2-ENG)978-1-349-10972-2 (OCoLC)1053844984 (DE-599)BVBBV045185660 |
dewey-full | 004.6 |
dewey-hundreds | 000 - Computer science, information, general works |
dewey-ones | 004 - Computer science |
dewey-raw | 004.6 |
dewey-search | 004.6 |
dewey-sort | 14.6 |
dewey-tens | 000 - Computer science, information, general works |
discipline | Informatik |
doi_str_mv | 10.1007/978-1-349-10972-2 |
format | Electronic eBook |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02185nmm a2200421zc 4500</leader><controlfield tag="001">BV045185660</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">180912s1989 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781349109722</subfield><subfield code="9">978-1-349-10972-2</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/978-1-349-10972-2</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-2-ENG)978-1-349-10972-2</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)1053844984</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV045185660</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-634</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">004.6</subfield><subfield code="2">23</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Mitchell, R. J.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Microcomputer Systems Using the STE Bus</subfield><subfield code="c">by R. J. Mitchell</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">London</subfield><subfield code="b">Macmillan Education UK</subfield><subfield code="c">1989</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (XI, 218 p)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">Computer Science Series</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">The IEEE approved STE bus is the newest bus standard to be introduced to ensure efficient and reliable communication between microprocessors and related devices. After introducing bus systems, the author gives a survey of buses. This is followed by detailed interfacing of slave devices to STE, with practical circuits. Other typical slave devices are then discussed. The various ways in which one or many microprocessors and other bus masters may be connected to STE are described. Testing, software, practical aspects of digital circuitry and technical requirements of the STE specification are then considered. Finally, algorithms for the design of sequential logic circuits are presented</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer Systems Organization and Communication Networks</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer System Implementation</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer network architectures</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9780333496497</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9781349109739</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://doi.org/10.1007/978-1-349-10972-2</subfield><subfield code="x">Verlag</subfield><subfield code="z">URL des Erstveröffentlichers</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-ENG</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">ZDB-2-ENG_Archiv</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-030574838</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-349-10972-2</subfield><subfield code="l">BTU01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="q">ZDB-2-ENG_Archiv</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
id | DE-604.BV045185660 |
illustrated | Not Illustrated |
indexdate | 2024-07-10T08:10:56Z |
institution | BVB |
isbn | 9781349109722 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030574838 |
oclc_num | 1053844984 |
open_access_boolean | |
owner | DE-634 |
owner_facet | DE-634 |
physical | 1 Online-Ressource (XI, 218 p) |
psigel | ZDB-2-ENG ZDB-2-ENG_Archiv ZDB-2-ENG ZDB-2-ENG_Archiv |
publishDate | 1989 |
publishDateSearch | 1989 |
publishDateSort | 1989 |
publisher | Macmillan Education UK |
record_format | marc |
series2 | Computer Science Series |
spelling | Mitchell, R. J. Verfasser aut Microcomputer Systems Using the STE Bus by R. J. Mitchell London Macmillan Education UK 1989 1 Online-Ressource (XI, 218 p) txt rdacontent c rdamedia cr rdacarrier Computer Science Series The IEEE approved STE bus is the newest bus standard to be introduced to ensure efficient and reliable communication between microprocessors and related devices. After introducing bus systems, the author gives a survey of buses. This is followed by detailed interfacing of slave devices to STE, with practical circuits. Other typical slave devices are then discussed. The various ways in which one or many microprocessors and other bus masters may be connected to STE are described. Testing, software, practical aspects of digital circuitry and technical requirements of the STE specification are then considered. Finally, algorithms for the design of sequential logic circuits are presented Computer Systems Organization and Communication Networks Computer System Implementation Computer network architectures Erscheint auch als Druck-Ausgabe 9780333496497 Erscheint auch als Druck-Ausgabe 9781349109739 https://doi.org/10.1007/978-1-349-10972-2 Verlag URL des Erstveröffentlichers Volltext |
spellingShingle | Mitchell, R. J. Microcomputer Systems Using the STE Bus Computer Systems Organization and Communication Networks Computer System Implementation Computer network architectures |
title | Microcomputer Systems Using the STE Bus |
title_auth | Microcomputer Systems Using the STE Bus |
title_exact_search | Microcomputer Systems Using the STE Bus |
title_full | Microcomputer Systems Using the STE Bus by R. J. Mitchell |
title_fullStr | Microcomputer Systems Using the STE Bus by R. J. Mitchell |
title_full_unstemmed | Microcomputer Systems Using the STE Bus by R. J. Mitchell |
title_short | Microcomputer Systems Using the STE Bus |
title_sort | microcomputer systems using the ste bus |
topic | Computer Systems Organization and Communication Networks Computer System Implementation Computer network architectures |
topic_facet | Computer Systems Organization and Communication Networks Computer System Implementation Computer network architectures |
url | https://doi.org/10.1007/978-1-349-10972-2 |
work_keys_str_mv | AT mitchellrj microcomputersystemsusingthestebus |