Analysis of Cache Performance for Operating Systems and Multiprogramming:
As we continue to build faster and fast. er computers, their performance is be coming increasingly dependent on the memory hierarchy. Both the clock speed of the machine and its throughput per clock depend heavily on the memory hierarchy. The time to complet. e a cache acce88 is oft. en the factor...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Boston, MA
Springer US
1989
|
| Schriftenreihe: | The Kluwer International Series in Engineering and Computer Science, Parallel Processing and Fifth Generation Computing
69 |
| Schlagworte: | |
| Online-Zugang: | BTU01 Volltext |
| Zusammenfassung: | As we continue to build faster and fast. er computers, their performance is be coming increasingly dependent on the memory hierarchy. Both the clock speed of the machine and its throughput per clock depend heavily on the memory hierarchy. The time to complet. e a cache acce88 is oft. en the factor that det. er mines the cycle time. The effectiveness of the hierarchy in keeping the average cost of a reference down has a major impact on how close the sustained per formance is to the peak performance. Small changes in the performance of the memory hierarchy cause large changes in overall system performance. The strong growth of ruse machines, whose performance is more tightly coupled to the memory hierarchy, has created increasing demand for high performance memory systems. This trend is likely to accelerate: the improvements in main memory performance will be small compared to the improvements in processor performance. This difference will lead to an increasing gap between prOCe880r cycle time and main memory acce. time. This gap must be closed by improving the memory hierarchy. Computer architects have attacked this gap by designing machines with cache sizes an order of magnitude larger than those appearing five years ago. Microproce880r-based RISe systems now have caches that rival the size of those in mainframes and supercomputers |
| Beschreibung: | 1 Online-Ressource (XXIV, 190 p) |
| ISBN: | 9781461316237 |
| DOI: | 10.1007/978-1-4613-1623-7 |
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| discipline | Informatik |
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| spelling | Agarwal, Anant Verfasser aut Analysis of Cache Performance for Operating Systems and Multiprogramming by Anant Agarwal Boston, MA Springer US 1989 1 Online-Ressource (XXIV, 190 p) txt rdacontent c rdamedia cr rdacarrier The Kluwer International Series in Engineering and Computer Science, Parallel Processing and Fifth Generation Computing 69 As we continue to build faster and fast. er computers, their performance is be coming increasingly dependent on the memory hierarchy. Both the clock speed of the machine and its throughput per clock depend heavily on the memory hierarchy. The time to complet. e a cache acce88 is oft. en the factor that det. er mines the cycle time. The effectiveness of the hierarchy in keeping the average cost of a reference down has a major impact on how close the sustained per formance is to the peak performance. Small changes in the performance of the memory hierarchy cause large changes in overall system performance. The strong growth of ruse machines, whose performance is more tightly coupled to the memory hierarchy, has created increasing demand for high performance memory systems. This trend is likely to accelerate: the improvements in main memory performance will be small compared to the improvements in processor performance. This difference will lead to an increasing gap between prOCe880r cycle time and main memory acce. time. This gap must be closed by improving the memory hierarchy. Computer architects have attacked this gap by designing machines with cache sizes an order of magnitude larger than those appearing five years ago. Microproce880r-based RISe systems now have caches that rival the size of those in mainframes and supercomputers Computer Science Processor Architectures Operating Systems Computer science Microprocessors Operating systems (Computers) Pufferspeicher (DE-588)4176324-5 gnd rswk-swf 1\p (DE-588)4113937-9 Hochschulschrift gnd-content Pufferspeicher (DE-588)4176324-5 s 2\p DE-604 Erscheint auch als Druck-Ausgabe 9781461288978 https://doi.org/10.1007/978-1-4613-1623-7 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 2\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Agarwal, Anant Analysis of Cache Performance for Operating Systems and Multiprogramming Computer Science Processor Architectures Operating Systems Computer science Microprocessors Operating systems (Computers) Pufferspeicher (DE-588)4176324-5 gnd |
| subject_GND | (DE-588)4176324-5 (DE-588)4113937-9 |
| title | Analysis of Cache Performance for Operating Systems and Multiprogramming |
| title_auth | Analysis of Cache Performance for Operating Systems and Multiprogramming |
| title_exact_search | Analysis of Cache Performance for Operating Systems and Multiprogramming |
| title_full | Analysis of Cache Performance for Operating Systems and Multiprogramming by Anant Agarwal |
| title_fullStr | Analysis of Cache Performance for Operating Systems and Multiprogramming by Anant Agarwal |
| title_full_unstemmed | Analysis of Cache Performance for Operating Systems and Multiprogramming by Anant Agarwal |
| title_short | Analysis of Cache Performance for Operating Systems and Multiprogramming |
| title_sort | analysis of cache performance for operating systems and multiprogramming |
| topic | Computer Science Processor Architectures Operating Systems Computer science Microprocessors Operating systems (Computers) Pufferspeicher (DE-588)4176324-5 gnd |
| topic_facet | Computer Science Processor Architectures Operating Systems Computer science Microprocessors Operating systems (Computers) Pufferspeicher Hochschulschrift |
| url | https://doi.org/10.1007/978-1-4613-1623-7 |
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