Algorithms for VLSI Physical Design Automation:
Algorithms for VLSI Physical Design Automation, Second Edition is a core reference text for graduate students and CAD professionals. Based on the very successful First Edition, it provides a comprehensive treatment of the principles and algorithms of VLSI physical design, presenting the concepts and...
Gespeichert in:
1. Verfasser: | |
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Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Boston, MA
Springer US
1995
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Ausgabe: | Second Edition |
Schlagworte: | |
Online-Zugang: | BTU01 URL des Erstveröffentlichers |
Zusammenfassung: | Algorithms for VLSI Physical Design Automation, Second Edition is a core reference text for graduate students and CAD professionals. Based on the very successful First Edition, it provides a comprehensive treatment of the principles and algorithms of VLSI physical design, presenting the concepts and algorithms in an intuitive manner. Each chapter contains 3-4 algorithms that are discussed in detail. Additional algorithms are presented in a somewhat shorter format. References to advanced algorithms are presented at the end of each chapter. Algorithms for VLSI Physical Design Automation covers all aspects of physical design. In 1992, when the First Edition was published, the largest available microprocessor had one million transistors and was fabricated using three metal layers. Now we process with six metal layers, fabricating 15 million transistors on a chip. Designs are moving to the 500-700 MHz frequency goal. These stunning developments have significantly altered the VLSI field: over-the-cell routing and early floorplanning have come to occupy a central place in the physical design flow. This Second Edition introduces a realistic picture to the reader, exposing the concerns facing the VLSI industry, while maintaining the theoretical flavor of the First Edition. New material has been added to all chapters, new sections have been added to most chapters, and a few chapters have been completely rewritten. The textual material is supplemented and clarified by many helpful figures. Audience: An invaluable reference for professionals in layout, design automation and physical design |
Beschreibung: | 1 Online-Ressource (XXVII, 538 p) |
ISBN: | 9781461523512 |
DOI: | 10.1007/978-1-4615-2351-2 |
Internformat
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520 | |a Algorithms for VLSI Physical Design Automation, Second Edition is a core reference text for graduate students and CAD professionals. Based on the very successful First Edition, it provides a comprehensive treatment of the principles and algorithms of VLSI physical design, presenting the concepts and algorithms in an intuitive manner. Each chapter contains 3-4 algorithms that are discussed in detail. Additional algorithms are presented in a somewhat shorter format. References to advanced algorithms are presented at the end of each chapter. Algorithms for VLSI Physical Design Automation covers all aspects of physical design. In 1992, when the First Edition was published, the largest available microprocessor had one million transistors and was fabricated using three metal layers. Now we process with six metal layers, fabricating 15 million transistors on a chip. Designs are moving to the 500-700 MHz frequency goal. These stunning developments have significantly altered the VLSI field: over-the-cell routing and early floorplanning have come to occupy a central place in the physical design flow. This Second Edition introduces a realistic picture to the reader, exposing the concerns facing the VLSI industry, while maintaining the theoretical flavor of the First Edition. New material has been added to all chapters, new sections have been added to most chapters, and a few chapters have been completely rewritten. The textual material is supplemented and clarified by many helpful figures. Audience: An invaluable reference for professionals in layout, design automation and physical design | ||
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Datensatz im Suchindex
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any_adam_object | |
author | Sherwani, Naveed |
author_facet | Sherwani, Naveed |
author_role | aut |
author_sort | Sherwani, Naveed |
author_variant | n s ns |
building | Verbundindex |
bvnumber | BV045185030 |
collection | ZDB-2-ENG |
ctrlnum | (ZDB-2-ENG)978-1-4615-2351-2 (OCoLC)1053833696 (DE-599)BVBBV045185030 |
dewey-full | 621.3815 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.3815 |
dewey-search | 621.3815 |
dewey-sort | 3621.3815 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
doi_str_mv | 10.1007/978-1-4615-2351-2 |
edition | Second Edition |
format | Electronic eBook |
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id | DE-604.BV045185030 |
illustrated | Not Illustrated |
indexdate | 2024-07-10T08:10:54Z |
institution | BVB |
isbn | 9781461523512 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030574208 |
oclc_num | 1053833696 |
open_access_boolean | |
owner | DE-634 |
owner_facet | DE-634 |
physical | 1 Online-Ressource (XXVII, 538 p) |
psigel | ZDB-2-ENG ZDB-2-ENG_Archiv ZDB-2-ENG ZDB-2-ENG_Archiv |
publishDate | 1995 |
publishDateSearch | 1995 |
publishDateSort | 1995 |
publisher | Springer US |
record_format | marc |
spelling | Sherwani, Naveed Verfasser aut Algorithms for VLSI Physical Design Automation by Naveed Sherwani Second Edition Boston, MA Springer US 1995 1 Online-Ressource (XXVII, 538 p) txt rdacontent c rdamedia cr rdacarrier Algorithms for VLSI Physical Design Automation, Second Edition is a core reference text for graduate students and CAD professionals. Based on the very successful First Edition, it provides a comprehensive treatment of the principles and algorithms of VLSI physical design, presenting the concepts and algorithms in an intuitive manner. Each chapter contains 3-4 algorithms that are discussed in detail. Additional algorithms are presented in a somewhat shorter format. References to advanced algorithms are presented at the end of each chapter. Algorithms for VLSI Physical Design Automation covers all aspects of physical design. In 1992, when the First Edition was published, the largest available microprocessor had one million transistors and was fabricated using three metal layers. Now we process with six metal layers, fabricating 15 million transistors on a chip. Designs are moving to the 500-700 MHz frequency goal. These stunning developments have significantly altered the VLSI field: over-the-cell routing and early floorplanning have come to occupy a central place in the physical design flow. This Second Edition introduces a realistic picture to the reader, exposing the concerns facing the VLSI industry, while maintaining the theoretical flavor of the First Edition. New material has been added to all chapters, new sections have been added to most chapters, and a few chapters have been completely rewritten. The textual material is supplemented and clarified by many helpful figures. Audience: An invaluable reference for professionals in layout, design automation and physical design Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits VLSI (DE-588)4117388-0 gnd rswk-swf Algorithmus (DE-588)4001183-5 gnd rswk-swf Entwurf (DE-588)4121208-3 gnd rswk-swf Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf VLSI (DE-588)4117388-0 s Entwurf (DE-588)4121208-3 s 1\p DE-604 Algorithmus (DE-588)4001183-5 s 2\p DE-604 Schaltungsentwurf (DE-588)4179389-4 s 3\p DE-604 Erscheint auch als Druck-Ausgabe 9781461359975 https://doi.org/10.1007/978-1-4615-2351-2 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 2\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 3\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Sherwani, Naveed Algorithms for VLSI Physical Design Automation Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits VLSI (DE-588)4117388-0 gnd Algorithmus (DE-588)4001183-5 gnd Entwurf (DE-588)4121208-3 gnd Schaltungsentwurf (DE-588)4179389-4 gnd |
subject_GND | (DE-588)4117388-0 (DE-588)4001183-5 (DE-588)4121208-3 (DE-588)4179389-4 |
title | Algorithms for VLSI Physical Design Automation |
title_auth | Algorithms for VLSI Physical Design Automation |
title_exact_search | Algorithms for VLSI Physical Design Automation |
title_full | Algorithms for VLSI Physical Design Automation by Naveed Sherwani |
title_fullStr | Algorithms for VLSI Physical Design Automation by Naveed Sherwani |
title_full_unstemmed | Algorithms for VLSI Physical Design Automation by Naveed Sherwani |
title_short | Algorithms for VLSI Physical Design Automation |
title_sort | algorithms for vlsi physical design automation |
topic | Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits VLSI (DE-588)4117388-0 gnd Algorithmus (DE-588)4001183-5 gnd Entwurf (DE-588)4121208-3 gnd Schaltungsentwurf (DE-588)4179389-4 gnd |
topic_facet | Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits VLSI Algorithmus Entwurf Schaltungsentwurf |
url | https://doi.org/10.1007/978-1-4615-2351-2 |
work_keys_str_mv | AT sherwaninaveed algorithmsforvlsiphysicaldesignautomation |