Digital Signal Processing with Field Programmable Gate Arrays:
Field-Programmable Gate Arrays (FPGAs) are revolutionizing digital signal processing as novel FPGA families are replacing ASICs and PDSPs for front-end digital signal processing algorithms. So the efficient implementation of these algorithms is critical and is the main goal of this book. It starts w...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Berlin, Heidelberg
Springer Berlin Heidelberg
2004
|
| Ausgabe: | Second Edition |
| Schriftenreihe: | Signals and Communication Technology
|
| Schlagworte: | |
| Online-Zugang: | FHI01 BTU01 Volltext Inhaltsverzeichnis |
| Zusammenfassung: | Field-Programmable Gate Arrays (FPGAs) are revolutionizing digital signal processing as novel FPGA families are replacing ASICs and PDSPs for front-end digital signal processing algorithms. So the efficient implementation of these algorithms is critical and is the main goal of this book. It starts with an overview of today's FPGA technology, devices, and tools for designing state-of-the-art DSP systems. A case study in the first chapter is the basis for more than 30 design examples throughout. The following chapters deal with computer arithmetic concepts, theory and the implementation of FIR and IIR filters, multirate digital signal processing systems, DFT and FFT algorithms, and advanced algorithms with high future potential. Each chapter contains exercises. The VERILOG source code and a glossary are given in the appendices, while the accompanying CD-ROM contains the examples in VHDL and Verilog code as well as the newest Altera "Baseline" software. This edition has a new chapter on adaptive filters, new sections on division and floating point arithmetics, an up-date to the current Altera software, and some new exercises |
| Beschreibung: | 1 Online-Ressource (XVII, 527 p. 101 illus) |
| ISBN: | 9783662067284 |
| DOI: | 10.1007/978-3-662-06728-4 |
Internformat
MARC
| LEADER | 00000nmm a2200000zc 4500 | ||
|---|---|---|---|
| 001 | BV045149432 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | cr|uuu---uuuuu | ||
| 008 | 180827s2004 |||| o||u| ||||||eng d | ||
| 020 | |a 9783662067284 |9 978-3-662-06728-4 | ||
| 024 | 7 | |a 10.1007/978-3-662-06728-4 |2 doi | |
| 035 | |a (ZDB-2-ENG)978-3-662-06728-4 | ||
| 035 | |a (OCoLC)1184481163 | ||
| 035 | |a (DE-599)BVBBV045149432 | ||
| 040 | |a DE-604 |b ger |e aacr | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-573 |a DE-634 | ||
| 082 | 0 | |a 621.382 |2 23 | |
| 100 | 1 | |a Meyer-Baese, Uwe |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Digital Signal Processing with Field Programmable Gate Arrays |c by Uwe Meyer-Baese |
| 250 | |a Second Edition | ||
| 264 | 1 | |a Berlin, Heidelberg |b Springer Berlin Heidelberg |c 2004 | |
| 300 | |a 1 Online-Ressource (XVII, 527 p. 101 illus) | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 490 | 0 | |a Signals and Communication Technology | |
| 520 | |a Field-Programmable Gate Arrays (FPGAs) are revolutionizing digital signal processing as novel FPGA families are replacing ASICs and PDSPs for front-end digital signal processing algorithms. So the efficient implementation of these algorithms is critical and is the main goal of this book. It starts with an overview of today's FPGA technology, devices, and tools for designing state-of-the-art DSP systems. A case study in the first chapter is the basis for more than 30 design examples throughout. The following chapters deal with computer arithmetic concepts, theory and the implementation of FIR and IIR filters, multirate digital signal processing systems, DFT and FFT algorithms, and advanced algorithms with high future potential. Each chapter contains exercises. The VERILOG source code and a glossary are given in the appendices, while the accompanying CD-ROM contains the examples in VHDL and Verilog code as well as the newest Altera "Baseline" software. This edition has a new chapter on adaptive filters, new sections on division and floating point arithmetics, an up-date to the current Altera software, and some new exercises | ||
| 650 | 4 | |a Engineering | |
| 650 | 4 | |a Signal, Image and Speech Processing | |
| 650 | 4 | |a Computer Hardware | |
| 650 | 4 | |a Input/Output and Data Communications | |
| 650 | 4 | |a Electronics and Microelectronics, Instrumentation | |
| 650 | 4 | |a Engineering | |
| 650 | 4 | |a Computer hardware | |
| 650 | 4 | |a Input-output equipment (Computers) | |
| 650 | 4 | |a Electronics | |
| 650 | 4 | |a Microelectronics | |
| 650 | 0 | 7 | |a Field programmable gate array |0 (DE-588)4347749-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Digitale Signalverarbeitung |0 (DE-588)4113314-6 |2 gnd |9 rswk-swf |
| 655 | 7 | |8 1\p |0 (DE-588)4123623-3 |a Lehrbuch |2 gnd-content | |
| 689 | 0 | 0 | |a Digitale Signalverarbeitung |0 (DE-588)4113314-6 |D s |
| 689 | 0 | 1 | |a Field programmable gate array |0 (DE-588)4347749-5 |D s |
| 689 | 0 | |8 2\p |5 DE-604 | |
| 776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9783662067307 |
| 856 | 4 | 0 | |u https://doi.org/10.1007/978-3-662-06728-4 |x Verlag |z URL des Erstveröffentlichers |3 Volltext |
| 856 | 4 | 2 | |m DNB Datenaustausch |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=030539130&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |3 Inhaltsverzeichnis |
| 912 | |a ZDB-2-ENG | ||
| 940 | 1 | |q ZDB-2-ENG_2000/2004 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-030539130 | ||
| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
| 883 | 1 | |8 2\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
| 966 | e | |u https://doi.org/10.1007/978-3-662-06728-4 |l FHI01 |p ZDB-2-ENG |q ZDB-2-ENG_2000/2004 |x Verlag |3 Volltext | |
| 966 | e | |u https://doi.org/10.1007/978-3-662-06728-4 |l BTU01 |p ZDB-2-ENG |q ZDB-2-ENG_Archiv |x Verlag |3 Volltext | |
Datensatz im Suchindex
| _version_ | 1804178821165875200 |
|---|---|
| adam_text | CONTENT
PREFACE 7
MARTA GRZECHNIK,
HETA HURSKAINEN
AND ALEXANDER OROST
BEYOND THE SEA. INTRODUCTION 9
BORIS DUNSCH
WHY DO WE VIOLATE STRANGE SEAS AND SACRED WATERS?
THE SEA AS BRIDGE AND BOUNDARY IN GREEK AND ROMAN POETRY 17
ALEXANDER FILIUSCHKIN
IMAGE OF SEAS AND RIVERS AS A FRONTIER BETWEEN THE
DIFFERENT WORLDS IN RUSSIAN MEDIEVAL NARRATIVE 43
LEHTI MAIRIKE
KEELMANN
AMBER ROSARIES, BALTIC FURS, AND PERSIAN CARPETS. THE TALLINN
MARY ALTARPIECE AS AN OBJECT OF HANSEATIC CONSPICUOUS CONSUMPTION? 53
MAGNUS RESSEL
THE FIRST GERMAN DREAM OF THE OCEAN.
THE PROJECT OF THE REICHS-ADMIRALITAT 1570
-1582 85
TILMAN PLATH
NAVAL STRENGTH AND MERCANTILE WEAKNESS. RUSSIA AND THE STRUGGLE FOR
PARTICIPATION IN THE BALTIC NAVIGATION DURING THE EIGHTEENTH CENTURY
.... 117
MARTA GRZECHNIK
FROM MOAT TO CONNECTING LINK.
SWEDEN AND THE BALTIC SEA IN THE TWENTIETH CENTURY 129
OLE SPARENBERG
MINING FOR MANGANESE NODULES.
THE DEEP SEA AS A CONTESTED SPACE (1960S
- 1980S) 149
MAGDALENA SCHONWEITZ
THE ORESUND REGION. BETWEEN UTOPIA AND REALITY 165
HTTP://D-NB.INFO/1050944356
STELAN EWERT
GOVERNANCE*AN ANALYTICAL CONCEPT TO STUDY THE BALTIC SEA REGION? ... 185
TIM
-AKE
PENTZ,
DARIA GRITSENKO
MARITIME GOVERNANCE IN THE BALTIC SEA REGION. THE EU S SUCCESS STORY?
203
JAN HENRIK
NILSSON
LOGISTIC REVOLUTIONS AND TERRITORIAL CHANGE.
IMPLICATIONS FOR THE BALTIC SEA REGION 227
BIOGRAPHICAL NOTES 253
INDEX 257
|
| any_adam_object | 1 |
| author | Meyer-Baese, Uwe |
| author_facet | Meyer-Baese, Uwe |
| author_role | aut |
| author_sort | Meyer-Baese, Uwe |
| author_variant | u m b umb |
| building | Verbundindex |
| bvnumber | BV045149432 |
| collection | ZDB-2-ENG |
| ctrlnum | (ZDB-2-ENG)978-3-662-06728-4 (OCoLC)1184481163 (DE-599)BVBBV045149432 |
| dewey-full | 621.382 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.382 |
| dewey-search | 621.382 |
| dewey-sort | 3621.382 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| doi_str_mv | 10.1007/978-3-662-06728-4 |
| edition | Second Edition |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>03832nmm a2200625zc 4500</leader><controlfield tag="001">BV045149432</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">180827s2004 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9783662067284</subfield><subfield code="9">978-3-662-06728-4</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/978-3-662-06728-4</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-2-ENG)978-3-662-06728-4</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)1184481163</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV045149432</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-573</subfield><subfield code="a">DE-634</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.382</subfield><subfield code="2">23</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Meyer-Baese, Uwe</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Digital Signal Processing with Field Programmable Gate Arrays</subfield><subfield code="c">by Uwe Meyer-Baese</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">Second Edition</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Berlin, Heidelberg</subfield><subfield code="b">Springer Berlin Heidelberg</subfield><subfield code="c">2004</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (XVII, 527 p. 101 illus)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">Signals and Communication Technology</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">Field-Programmable Gate Arrays (FPGAs) are revolutionizing digital signal processing as novel FPGA families are replacing ASICs and PDSPs for front-end digital signal processing algorithms. So the efficient implementation of these algorithms is critical and is the main goal of this book. It starts with an overview of today's FPGA technology, devices, and tools for designing state-of-the-art DSP systems. A case study in the first chapter is the basis for more than 30 design examples throughout. The following chapters deal with computer arithmetic concepts, theory and the implementation of FIR and IIR filters, multirate digital signal processing systems, DFT and FFT algorithms, and advanced algorithms with high future potential. Each chapter contains exercises. The VERILOG source code and a glossary are given in the appendices, while the accompanying CD-ROM contains the examples in VHDL and Verilog code as well as the newest Altera "Baseline" software. This edition has a new chapter on adaptive filters, new sections on division and floating point arithmetics, an up-date to the current Altera software, and some new exercises</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Signal, Image and Speech Processing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer Hardware</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Input/Output and Data Communications</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronics and Microelectronics, Instrumentation</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer hardware</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Input-output equipment (Computers)</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronics</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Microelectronics</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Field programmable gate array</subfield><subfield code="0">(DE-588)4347749-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Digitale Signalverarbeitung</subfield><subfield code="0">(DE-588)4113314-6</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="8">1\p</subfield><subfield code="0">(DE-588)4123623-3</subfield><subfield code="a">Lehrbuch</subfield><subfield code="2">gnd-content</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Digitale Signalverarbeitung</subfield><subfield code="0">(DE-588)4113314-6</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Field programmable gate array</subfield><subfield code="0">(DE-588)4347749-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="8">2\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9783662067307</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://doi.org/10.1007/978-3-662-06728-4</subfield><subfield code="x">Verlag</subfield><subfield code="z">URL des Erstveröffentlichers</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="856" ind1="4" ind2="2"><subfield code="m">DNB Datenaustausch</subfield><subfield code="q">application/pdf</subfield><subfield code="u">http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=030539130&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA</subfield><subfield code="3">Inhaltsverzeichnis</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-ENG</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">ZDB-2-ENG_2000/2004</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-030539130</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">2\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-3-662-06728-4</subfield><subfield code="l">FHI01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="q">ZDB-2-ENG_2000/2004</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-3-662-06728-4</subfield><subfield code="l">BTU01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="q">ZDB-2-ENG_Archiv</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
| genre | 1\p (DE-588)4123623-3 Lehrbuch gnd-content |
| genre_facet | Lehrbuch |
| id | DE-604.BV045149432 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T08:10:03Z |
| institution | BVB |
| isbn | 9783662067284 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030539130 |
| oclc_num | 1184481163 |
| open_access_boolean | |
| owner | DE-573 DE-634 |
| owner_facet | DE-573 DE-634 |
| physical | 1 Online-Ressource (XVII, 527 p. 101 illus) |
| psigel | ZDB-2-ENG ZDB-2-ENG_2000/2004 ZDB-2-ENG ZDB-2-ENG_2000/2004 ZDB-2-ENG ZDB-2-ENG_Archiv |
| publishDate | 2004 |
| publishDateSearch | 2004 |
| publishDateSort | 2004 |
| publisher | Springer Berlin Heidelberg |
| record_format | marc |
| series2 | Signals and Communication Technology |
| spelling | Meyer-Baese, Uwe Verfasser aut Digital Signal Processing with Field Programmable Gate Arrays by Uwe Meyer-Baese Second Edition Berlin, Heidelberg Springer Berlin Heidelberg 2004 1 Online-Ressource (XVII, 527 p. 101 illus) txt rdacontent c rdamedia cr rdacarrier Signals and Communication Technology Field-Programmable Gate Arrays (FPGAs) are revolutionizing digital signal processing as novel FPGA families are replacing ASICs and PDSPs for front-end digital signal processing algorithms. So the efficient implementation of these algorithms is critical and is the main goal of this book. It starts with an overview of today's FPGA technology, devices, and tools for designing state-of-the-art DSP systems. A case study in the first chapter is the basis for more than 30 design examples throughout. The following chapters deal with computer arithmetic concepts, theory and the implementation of FIR and IIR filters, multirate digital signal processing systems, DFT and FFT algorithms, and advanced algorithms with high future potential. Each chapter contains exercises. The VERILOG source code and a glossary are given in the appendices, while the accompanying CD-ROM contains the examples in VHDL and Verilog code as well as the newest Altera "Baseline" software. This edition has a new chapter on adaptive filters, new sections on division and floating point arithmetics, an up-date to the current Altera software, and some new exercises Engineering Signal, Image and Speech Processing Computer Hardware Input/Output and Data Communications Electronics and Microelectronics, Instrumentation Computer hardware Input-output equipment (Computers) Electronics Microelectronics Field programmable gate array (DE-588)4347749-5 gnd rswk-swf Digitale Signalverarbeitung (DE-588)4113314-6 gnd rswk-swf 1\p (DE-588)4123623-3 Lehrbuch gnd-content Digitale Signalverarbeitung (DE-588)4113314-6 s Field programmable gate array (DE-588)4347749-5 s 2\p DE-604 Erscheint auch als Druck-Ausgabe 9783662067307 https://doi.org/10.1007/978-3-662-06728-4 Verlag URL des Erstveröffentlichers Volltext DNB Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=030539130&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 2\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Meyer-Baese, Uwe Digital Signal Processing with Field Programmable Gate Arrays Engineering Signal, Image and Speech Processing Computer Hardware Input/Output and Data Communications Electronics and Microelectronics, Instrumentation Computer hardware Input-output equipment (Computers) Electronics Microelectronics Field programmable gate array (DE-588)4347749-5 gnd Digitale Signalverarbeitung (DE-588)4113314-6 gnd |
| subject_GND | (DE-588)4347749-5 (DE-588)4113314-6 (DE-588)4123623-3 |
| title | Digital Signal Processing with Field Programmable Gate Arrays |
| title_auth | Digital Signal Processing with Field Programmable Gate Arrays |
| title_exact_search | Digital Signal Processing with Field Programmable Gate Arrays |
| title_full | Digital Signal Processing with Field Programmable Gate Arrays by Uwe Meyer-Baese |
| title_fullStr | Digital Signal Processing with Field Programmable Gate Arrays by Uwe Meyer-Baese |
| title_full_unstemmed | Digital Signal Processing with Field Programmable Gate Arrays by Uwe Meyer-Baese |
| title_short | Digital Signal Processing with Field Programmable Gate Arrays |
| title_sort | digital signal processing with field programmable gate arrays |
| topic | Engineering Signal, Image and Speech Processing Computer Hardware Input/Output and Data Communications Electronics and Microelectronics, Instrumentation Computer hardware Input-output equipment (Computers) Electronics Microelectronics Field programmable gate array (DE-588)4347749-5 gnd Digitale Signalverarbeitung (DE-588)4113314-6 gnd |
| topic_facet | Engineering Signal, Image and Speech Processing Computer Hardware Input/Output and Data Communications Electronics and Microelectronics, Instrumentation Computer hardware Input-output equipment (Computers) Electronics Microelectronics Field programmable gate array Digitale Signalverarbeitung Lehrbuch |
| url | https://doi.org/10.1007/978-3-662-06728-4 http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=030539130&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
| work_keys_str_mv | AT meyerbaeseuwe digitalsignalprocessingwithfieldprogrammablegatearrays |