SystemVerilog For Design: A Guide to Using SystemVerilog for Hardware Design and Modeling
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Boston, MA
Springer US
2004
|
| Schlagworte: | |
| Online-Zugang: | FHI01 BTU01 Volltext |
| Beschreibung: | 1 Online-Ressource (XXVIII, 374 p. 4 illus) |
| ISBN: | 9781475766820 |
| DOI: | 10.1007/978-1-4757-6682-0 |
Internformat
MARC
| LEADER | 00000nmm a2200000zc 4500 | ||
|---|---|---|---|
| 001 | BV045149075 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | cr|uuu---uuuuu | ||
| 008 | 180827s2004 |||| o||u| ||||||eng d | ||
| 020 | |a 9781475766820 |9 978-1-4757-6682-0 | ||
| 024 | 7 | |a 10.1007/978-1-4757-6682-0 |2 doi | |
| 035 | |a (ZDB-2-ENG)978-1-4757-6682-0 | ||
| 035 | |a (OCoLC)1184483216 | ||
| 035 | |a (DE-599)BVBBV045149075 | ||
| 040 | |a DE-604 |b ger |e aacr | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-573 |a DE-634 | ||
| 082 | 0 | |a 621.3815 |2 23 | |
| 100 | 1 | |a Sutherland, Stuart |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a SystemVerilog For Design |b A Guide to Using SystemVerilog for Hardware Design and Modeling |c by Stuart Sutherland, Simon Davidmann, Peter Flake |
| 264 | 1 | |a Boston, MA |b Springer US |c 2004 | |
| 300 | |a 1 Online-Ressource (XXVIII, 374 p. 4 illus) | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 650 | 4 | |a Engineering | |
| 650 | 4 | |a Circuits and Systems | |
| 650 | 4 | |a Electrical Engineering | |
| 650 | 4 | |a Computer-Aided Engineering (CAD, CAE) and Design | |
| 650 | 4 | |a Engineering | |
| 650 | 4 | |a Computer-aided engineering | |
| 650 | 4 | |a Electrical engineering | |
| 650 | 4 | |a Electronic circuits | |
| 650 | 0 | 7 | |a VERILOG |0 (DE-588)4268385-3 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a VERILOG |0 (DE-588)4268385-3 |D s |
| 689 | 0 | |8 1\p |5 DE-604 | |
| 700 | 1 | |a Davidmann, Simon |4 aut | |
| 700 | 1 | |a Flake, Peter |4 aut | |
| 776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9781475766844 |
| 856 | 4 | 0 | |u https://doi.org/10.1007/978-1-4757-6682-0 |x Verlag |z URL des Erstveröffentlichers |3 Volltext |
| 912 | |a ZDB-2-ENG | ||
| 940 | 1 | |q ZDB-2-ENG_2000/2004 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-030538774 | ||
| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
| 966 | e | |u https://doi.org/10.1007/978-1-4757-6682-0 |l FHI01 |p ZDB-2-ENG |q ZDB-2-ENG_2000/2004 |x Verlag |3 Volltext | |
| 966 | e | |u https://doi.org/10.1007/978-1-4757-6682-0 |l BTU01 |p ZDB-2-ENG |q ZDB-2-ENG_Archiv |x Verlag |3 Volltext | |
Datensatz im Suchindex
| _version_ | 1804178820159242240 |
|---|---|
| any_adam_object | |
| author | Sutherland, Stuart Davidmann, Simon Flake, Peter |
| author_facet | Sutherland, Stuart Davidmann, Simon Flake, Peter |
| author_role | aut aut aut |
| author_sort | Sutherland, Stuart |
| author_variant | s s ss s d sd p f pf |
| building | Verbundindex |
| bvnumber | BV045149075 |
| collection | ZDB-2-ENG |
| ctrlnum | (ZDB-2-ENG)978-1-4757-6682-0 (OCoLC)1184483216 (DE-599)BVBBV045149075 |
| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| doi_str_mv | 10.1007/978-1-4757-6682-0 |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02031nmm a2200529zc 4500</leader><controlfield tag="001">BV045149075</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">180827s2004 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781475766820</subfield><subfield code="9">978-1-4757-6682-0</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/978-1-4757-6682-0</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-2-ENG)978-1-4757-6682-0</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)1184483216</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV045149075</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-573</subfield><subfield code="a">DE-634</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815</subfield><subfield code="2">23</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Sutherland, Stuart</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">SystemVerilog For Design</subfield><subfield code="b">A Guide to Using SystemVerilog for Hardware Design and Modeling</subfield><subfield code="c">by Stuart Sutherland, Simon Davidmann, Peter Flake</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston, MA</subfield><subfield code="b">Springer US</subfield><subfield code="c">2004</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (XXVIII, 374 p. 4 illus)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits and Systems</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer-Aided Engineering (CAD, CAE) and Design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer-aided engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic circuits</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VERILOG</subfield><subfield code="0">(DE-588)4268385-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VERILOG</subfield><subfield code="0">(DE-588)4268385-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Davidmann, Simon</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Flake, Peter</subfield><subfield code="4">aut</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9781475766844</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://doi.org/10.1007/978-1-4757-6682-0</subfield><subfield code="x">Verlag</subfield><subfield code="z">URL des Erstveröffentlichers</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-ENG</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">ZDB-2-ENG_2000/2004</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-030538774</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-4757-6682-0</subfield><subfield code="l">FHI01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="q">ZDB-2-ENG_2000/2004</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-4757-6682-0</subfield><subfield code="l">BTU01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="q">ZDB-2-ENG_Archiv</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
| id | DE-604.BV045149075 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T08:10:02Z |
| institution | BVB |
| isbn | 9781475766820 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030538774 |
| oclc_num | 1184483216 |
| open_access_boolean | |
| owner | DE-573 DE-634 |
| owner_facet | DE-573 DE-634 |
| physical | 1 Online-Ressource (XXVIII, 374 p. 4 illus) |
| psigel | ZDB-2-ENG ZDB-2-ENG_2000/2004 ZDB-2-ENG ZDB-2-ENG_2000/2004 ZDB-2-ENG ZDB-2-ENG_Archiv |
| publishDate | 2004 |
| publishDateSearch | 2004 |
| publishDateSort | 2004 |
| publisher | Springer US |
| record_format | marc |
| spelling | Sutherland, Stuart Verfasser aut SystemVerilog For Design A Guide to Using SystemVerilog for Hardware Design and Modeling by Stuart Sutherland, Simon Davidmann, Peter Flake Boston, MA Springer US 2004 1 Online-Ressource (XXVIII, 374 p. 4 illus) txt rdacontent c rdamedia cr rdacarrier Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits VERILOG (DE-588)4268385-3 gnd rswk-swf VERILOG (DE-588)4268385-3 s 1\p DE-604 Davidmann, Simon aut Flake, Peter aut Erscheint auch als Druck-Ausgabe 9781475766844 https://doi.org/10.1007/978-1-4757-6682-0 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Sutherland, Stuart Davidmann, Simon Flake, Peter SystemVerilog For Design A Guide to Using SystemVerilog for Hardware Design and Modeling Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits VERILOG (DE-588)4268385-3 gnd |
| subject_GND | (DE-588)4268385-3 |
| title | SystemVerilog For Design A Guide to Using SystemVerilog for Hardware Design and Modeling |
| title_auth | SystemVerilog For Design A Guide to Using SystemVerilog for Hardware Design and Modeling |
| title_exact_search | SystemVerilog For Design A Guide to Using SystemVerilog for Hardware Design and Modeling |
| title_full | SystemVerilog For Design A Guide to Using SystemVerilog for Hardware Design and Modeling by Stuart Sutherland, Simon Davidmann, Peter Flake |
| title_fullStr | SystemVerilog For Design A Guide to Using SystemVerilog for Hardware Design and Modeling by Stuart Sutherland, Simon Davidmann, Peter Flake |
| title_full_unstemmed | SystemVerilog For Design A Guide to Using SystemVerilog for Hardware Design and Modeling by Stuart Sutherland, Simon Davidmann, Peter Flake |
| title_short | SystemVerilog For Design |
| title_sort | systemverilog for design a guide to using systemverilog for hardware design and modeling |
| title_sub | A Guide to Using SystemVerilog for Hardware Design and Modeling |
| topic | Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits VERILOG (DE-588)4268385-3 gnd |
| topic_facet | Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits VERILOG |
| url | https://doi.org/10.1007/978-1-4757-6682-0 |
| work_keys_str_mv | AT sutherlandstuart systemverilogfordesignaguidetousingsystemverilogforhardwaredesignandmodeling AT davidmannsimon systemverilogfordesignaguidetousingsystemverilogforhardwaredesignandmodeling AT flakepeter systemverilogfordesignaguidetousingsystemverilogforhardwaredesignandmodeling |